| /external/vixl/examples/aarch64/ |
| D | add4-double.cc | 43 __ Ucvtf(d2, x0); in GenerateAdd4Double() local
44 __ Ucvtf(d3, x1); in GenerateAdd4Double() local
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| /external/vixl/test/aarch64/ |
| D | test-disasm-neon-aarch64.cc | 3820 COMPARE_MACRO(Ucvtf(v5.V2S(), v3.V2S()), in TEST()
3823 COMPARE_MACRO(Ucvtf(v6.V4S(), v4.V4S()), in TEST()
3826 COMPARE_MACRO(Ucvtf(v7.V2D(), v5.V2D()), in TEST()
3829 COMPARE_MACRO(Ucvtf(s8, s6), "ucvtf s8, s6"); in TEST()
3830 COMPARE_MACRO(Ucvtf(d8, d6), "ucvtf d8, d6"); in TEST()
3888 COMPARE_2REGMISC_FP16(Ucvtf, "ucvtf"); in TEST()
4324 COMPARE_MACRO(Ucvtf(v5.V4H(), v3.V4H(), 11), "ucvtf v5.4h, v3.4h, #11"); in TEST()
4325 COMPARE_MACRO(Ucvtf(v6.V8H(), v4.V8H(), 12), "ucvtf v6.8h, v4.8h, #12"); in TEST()
4326 COMPARE_MACRO(Ucvtf(v5.V2S(), v3.V2S(), 11), "ucvtf v5.2s, v3.2s, #11"); in TEST()
4327 COMPARE_MACRO(Ucvtf(v6.V4S(), v4.V4S(), 12), "ucvtf v6.4s, v4.4s, #12"); in TEST()
[all …]
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| D | test-assembler-fp-aarch64.cc | 4406 __ Ucvtf(d1, x10); in TestUScvtfHelper() local
4408 __ Ucvtf(d3, w11); in TestUScvtfHelper() local
4417 __ Ucvtf(d1, x10, fbits); in TestUScvtfHelper() local
4419 __ Ucvtf(d3, w11, fbits); in TestUScvtfHelper() local
4430 __ Ucvtf(d1, x10, fbits); in TestUScvtfHelper() local
4561 __ Ucvtf(s1, x10); in TestUScvtf32Helper() local
4563 __ Ucvtf(s3, w11); in TestUScvtf32Helper() local
4572 __ Ucvtf(s1, x10, fbits); in TestUScvtf32Helper() local
4574 __ Ucvtf(s3, w11, fbits); in TestUScvtf32Helper() local
4585 __ Ucvtf(s1, x10, fbits); in TestUScvtf32Helper() local
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| /external/v8/src/wasm/baseline/arm64/ |
| D | liftoff-assembler-arm64.h | 1259 Ucvtf(fp_cmp, dst.gp().W()); // i32 -> f64. in emit_type_conversion()
1337 Ucvtf(dst.fp().S(), src.gp().W()); in emit_type_conversion()
1343 Ucvtf(dst.fp().S(), src.gp().X()); in emit_type_conversion()
1355 Ucvtf(dst.fp().D(), src.gp().W()); in emit_type_conversion()
1361 Ucvtf(dst.fp().D(), src.gp().X()); in emit_type_conversion()
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| /external/v8/src/compiler/backend/arm64/ |
| D | code-generator-arm64.cc | 1684 __ Ucvtf(i.OutputFloat32Register(), i.InputRegister32(0)); in AssembleArchInstruction() local
1687 __ Ucvtf(i.OutputDoubleRegister(), i.InputRegister32(0)); in AssembleArchInstruction() local
1690 __ Ucvtf(i.OutputDoubleRegister().S(), i.InputRegister64(0)); in AssembleArchInstruction() local
1693 __ Ucvtf(i.OutputDoubleRegister(), i.InputRegister64(0)); in AssembleArchInstruction() local
2064 SIMD_UNOP_CASE(kArm64F32x4UConvertI32x4, Ucvtf, 4S); in AssembleArchInstruction()
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| /external/v8/src/codegen/arm64/ |
| D | macro-assembler-arm64.h | 1128 inline void Ucvtf(const VRegister& fd, const Register& rn,
1130 void Ucvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) {
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| D | macro-assembler-arm64-inl.h | 991 void TurboAssembler::Ucvtf(const VRegister& fd, const Register& rn, in Ucvtf() function
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 2522 void Ucvtf(const VRegister& vd, const Register& rn, int fbits = 0) {
3213 void Ucvtf(const VRegister& vd, const VRegister& vn, int fbits = 0) {
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