Searched refs:UnsignedSaturate (Results 1 – 6 of 6) sorted by relevance
| /external/v8/src/execution/arm64/ |
| D | simulator-arm64.cc | 4142 add(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4148 sub(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4160 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4172 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEON3Same()
5338 add(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
5344 sub(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
5350 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
5362 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEONScalar3Same()
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| D | simulator-logic-arm64.cc | 1422 return ushl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in uqshl()
1430 return sshl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in sqshlu()
1821 return ExtractNarrow(vform, dst, false, src, true).UnsignedSaturate(vform); in sqxtun()
1826 return ExtractNarrow(vform, dst, false, src, false).UnsignedSaturate(vform); in uqxtn()
2231 return shrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqshrn()
2236 return shrn2(vform, dst, src, shift).UnsignedSaturate(vform); in uqshrn2()
2241 return rshrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn()
2246 return rshrn2(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn2()
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| D | simulator-arm64.h | 572 LogicVRegister& UnsignedSaturate(VectorFormat vform) { in UnsignedSaturate() function
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| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 4684 add(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4690 sub(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4702 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEON3Same()
4714 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEON3Same()
6169 add(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
6175 sub(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
6181 ushl(vf, rd, rn, rm).UnsignedSaturate(vf); in VisitNEONScalar3Same()
6193 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf); in VisitNEONScalar3Same()
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| D | logic-aarch64.cc | 1560 return ushl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in uqshl()
1571 return sshl(vform, dst, src, shiftreg).UnsignedSaturate(vform); in sqshlu()
2018 return extractnarrow(vform, dst, false, src, true).UnsignedSaturate(vform); in sqxtun()
2025 return extractnarrow(vform, dst, false, src, false).UnsignedSaturate(vform); in uqxtn()
2726 return shrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqshrn()
2734 return shrn2(vform, dst, src, shift).UnsignedSaturate(vform); in uqshrn2()
2742 return rshrn(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn()
2750 return rshrn2(vform, dst, src, shift).UnsignedSaturate(vform); in uqrshrn2()
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| D | simulator-aarch64.h | 425 LogicVRegister& UnsignedSaturate(VectorFormat vform) { in UnsignedSaturate() function
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