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Searched refs:V4H (Results 1 – 11 of 11) sorted by relevance

/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc617 __ abs(v21.V4H(), v27.V4H()); in GenerateTestSequenceNEON()
625 __ add(v27.V4H(), v23.V4H(), v17.V4H()); in GenerateTestSequenceNEON()
630 __ addhn(v10.V4H(), v30.V4S(), v26.V4S()); in GenerateTestSequenceNEON()
639 __ addp(v29.V4H(), v24.V4H(), v14.V4H()); in GenerateTestSequenceNEON()
645 __ addv(h27, v30.V4H()); in GenerateTestSequenceNEON()
652 __ bic(v28.V4H(), 0x23, 8); in GenerateTestSequenceNEON()
664 __ cls(v1.V4H(), v12.V4H()); in GenerateTestSequenceNEON()
670 __ clz(v9.V4H(), v9.V4H()); in GenerateTestSequenceNEON()
682 __ cmeq(v6.V4H(), v23.V4H(), v20.V4H()); in GenerateTestSequenceNEON()
683 __ cmeq(v16.V4H(), v13.V4H(), 0); in GenerateTestSequenceNEON()
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Dtest-cpu-features-aarch64.cc758 TEST_NEON(abs_2, abs(v0.V4H(), v1.V4H()))
765 TEST_NEON(addhn_1, addhn(v0.V4H(), v1.V4S(), v2.V4S()))
773 TEST_NEON(addp_3, addp(v0.V4H(), v1.V4H(), v2.V4H()))
780 TEST_NEON(addv_2, addv(h0, v1.V4H()))
785 TEST_NEON(add_2, add(v0.V4H(), v1.V4H(), v2.V4H()))
793 TEST_NEON(bic_0, bic(v0.V4H(), 0x55, 0))
807 TEST_NEON(cls_2, cls(v0.V4H(), v1.V4H()))
813 TEST_NEON(clz_2, clz(v0.V4H(), v1.V4H()))
819 TEST_NEON(cmeq_2, cmeq(v0.V4H(), v1.V4H(), v2.V4H()))
827 TEST_NEON(cmeq_10, cmeq(v0.V4H(), v1.V4H(), 0))
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Dtest-disasm-neon-aarch64.cc307 V(V4H(), "4h") \
314 V(V4H(), "4h", V8B(), "8b") \
315 V(V2S(), "2s", V4H(), "4h") \
323 V(V4S(), "4s", V4H(), "4h") \
334 V(V4H(), "4h") \
340 V(V4H(), "4h") \
395 COMPARE_MACRO(Ld1(v2.V4H(), v3.V4H(), MemOperand(x17, 16, PostIndex)), in TEST()
422 COMPARE_MACRO(Ld2(v2.V4H(), v3.V4H(), MemOperand(x17, 16, PostIndex)), in TEST()
511 COMPARE_MACRO(St1(v2.V4H(), v3.V4H(), MemOperand(x17, 16, PostIndex)), in TEST()
539 COMPARE_MACRO(St2(v2.V4H(), v3.V4H(), MemOperand(x17, 16, PostIndex)), in TEST()
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Dtest-assembler-neon-aarch64.cc316 __ Ld1(v5.V4H(), v6.V4H(), v7.V4H(), MemOperand(x17)); in TEST()
370 __ Ld1(v5.V4H(), v6.V4H(), v7.V4H(), MemOperand(x19, 24, PostIndex)); in TEST()
597 __ Ld2(v6.V4H(), v7.V4H(), MemOperand(x17)); in TEST()
634 __ Ld2(v5.V4H(), v6.V4H(), MemOperand(x19, 16, PostIndex)); in TEST()
939 __ Ld2r(v4.V4H(), v5.V4H(), MemOperand(x17)); in TEST()
985 __ Ld2r(v4.V4H(), v5.V4H(), MemOperand(x17, x18, PostIndex)); in TEST()
1029 __ Ld3(v8.V4H(), v9.V4H(), v10.V4H(), MemOperand(x17)); in TEST()
1071 __ Ld3(v8.V4H(), v9.V4H(), v10.V4H(), MemOperand(x19, 24, PostIndex)); in TEST()
1410 __ Ld3r(v6.V4H(), v7.V4H(), v8.V4H(), MemOperand(x17)); in TEST()
1465 __ Ld3r(v6.V4H(), v7.V4H(), v8.V4H(), MemOperand(x17, x18, PostIndex)); in TEST()
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/external/v8/src/compiler/backend/arm64/
Dcode-generator-arm64.cc2288 __ Smull(tmp1, lhs.V4H(), rhs.V4H()); in AssembleArchInstruction()
2335 __ Sqxtn(dst.V4H(), src0.V4S()); in AssembleArchInstruction()
2373 __ Sqxtun(dst.V4H(), src0.V4S()); in AssembleArchInstruction()
2652 __ Ldr(i.OutputSimd128Register().V4H(), i.MemoryOperand(0)); in AssembleArchInstruction()
2653 __ Sxtl(i.OutputSimd128Register().V4S(), i.OutputSimd128Register().V4H()); in AssembleArchInstruction()
2657 __ Ldr(i.OutputSimd128Register().V4H(), i.MemoryOperand(0)); in AssembleArchInstruction()
2658 __ Uxtl(i.OutputSimd128Register().V4S(), i.OutputSimd128Register().V4H()); in AssembleArchInstruction()
/external/v8/src/wasm/baseline/arm64/
Dliftoff-assembler-arm64.h1497 Sxtl(dst.fp().V4S(), dst.fp().V4H()); in LoadTransform()
1500 Uxtl(dst.fp().V4S(), dst.fp().V4H()); in LoadTransform()
2029 Smull(tmp1, lhs.fp().V4H(), rhs.fp().V4H()); in emit_i32x4_dot_i16x8_s()
/external/vixl/src/aarch64/
Doperands-aarch64.h370 VRegister V4H() const { return VRegister(code_, kDRegSize, 4); } in V4H() function
Dmacro-assembler-aarch64.cc1046 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xffff); in Movi32bitHelper()
/external/v8/src/codegen/arm64/
Dregister-arm64.h330 VRegister V4H() const { in V4H() function
Dmacro-assembler-arm64.cc435 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xFFFF); in Movi32bitHelper()
/external/webrtc/talk/media/testdata/
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