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Searched refs:V8H (Results 1 – 12 of 12) sorted by relevance

/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc620 __ abs(v29.V8H(), v13.V8H()); in GenerateTestSequenceNEON()
628 __ add(v4.V8H(), v2.V8H(), v1.V8H()); in GenerateTestSequenceNEON()
631 __ addhn(v31.V8B(), v12.V8H(), v22.V8H()); in GenerateTestSequenceNEON()
632 __ addhn2(v16.V16B(), v21.V8H(), v20.V8H()); in GenerateTestSequenceNEON()
634 __ addhn2(v31.V8H(), v7.V4S(), v17.V4S()); in GenerateTestSequenceNEON()
642 __ addp(v17.V8H(), v8.V8H(), v12.V8H()); in GenerateTestSequenceNEON()
646 __ addv(h19, v14.V8H()); in GenerateTestSequenceNEON()
655 __ bic(v18.V8H(), 0x98); in GenerateTestSequenceNEON()
667 __ cls(v15.V8H(), v14.V8H()); in GenerateTestSequenceNEON()
673 __ clz(v6.V8H(), v11.V8H()); in GenerateTestSequenceNEON()
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Dtest-cpu-features-aarch64.cc759 TEST_NEON(abs_3, abs(v0.V8H(), v1.V8H()))
764 TEST_NEON(addhn_0, addhn(v0.V8B(), v1.V8H(), v2.V8H()))
767 TEST_NEON(addhn2_0, addhn2(v0.V16B(), v1.V8H(), v2.V8H()))
768 TEST_NEON(addhn2_1, addhn2(v0.V8H(), v1.V4S(), v2.V4S()))
774 TEST_NEON(addp_4, addp(v0.V8H(), v1.V8H(), v2.V8H()))
781 TEST_NEON(addv_3, addv(h0, v1.V8H()))
786 TEST_NEON(add_3, add(v0.V8H(), v1.V8H(), v2.V8H()))
794 TEST_NEON(bic_1, bic(v0.V8H(), 0x3a, 0))
808 TEST_NEON(cls_3, cls(v0.V8H(), v1.V8H()))
814 TEST_NEON(clz_3, clz(v0.V8H(), v1.V8H()))
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Dtest-disasm-neon-aarch64.cc308 V(V8H(), "8h") \
317 V(V8H(), "8h", V16B(), "16b") \
318 V(V4S(), "4s", V8H(), "8h") \
322 V(V8H(), "8h", V8B(), "8b") \
327 V(V8H(), "8h", V16B(), "16b") \
328 V(V4S(), "4s", V8H(), "8h") \
335 V(V8H(), "8h") \
341 V(V8H(), "8h") \
397 COMPARE_MACRO(Ld1(v4.V8H(), v5.V8H(), MemOperand(x18, 32, PostIndex)), in TEST()
424 COMPARE_MACRO(Ld2(v4.V8H(), v5.V8H(), MemOperand(x18, 32, PostIndex)), in TEST()
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Dtest-assembler-neon-aarch64.cc434 __ Ld1(v5.V8H(), v6.V8H(), v7.V8H(), MemOperand(x17)); in TEST()
480 __ Ld1(v5.V8H(), v6.V8H(), v7.V8H(), MemOperand(x19, 48, PostIndex)); in TEST()
676 __ Ld2(v6.V8H(), v7.V8H(), MemOperand(x17)); in TEST()
718 __ Ld2(v6.V8H(), v7.V8H(), MemOperand(x19, 32, PostIndex)); in TEST()
941 __ Ld2r(v6.V8H(), v7.V8H(), MemOperand(x17)); in TEST()
986 __ Ld2r(v6.V8H(), v7.V8H(), MemOperand(x17, 4, PostIndex)); in TEST()
1119 __ Ld3(v8.V8H(), v9.V8H(), v10.V8H(), MemOperand(x17)); in TEST()
1167 __ Ld3(v8.V8H(), v9.V8H(), v10.V8H(), MemOperand(x19, 48, PostIndex)); in TEST()
1412 __ Ld3r(v9.V8H(), v10.V8H(), v11.V8H(), MemOperand(x17)); in TEST()
1466 __ Ld3r(v9.V8H(), v10.V8H(), v11.V8H(), MemOperand(x17, 6, PostIndex)); in TEST()
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/external/v8/src/wasm/baseline/arm64/
Dliftoff-assembler-arm64.h1491 Sxtl(dst.fp().V8H(), dst.fp().V8B()); in LoadTransform()
1494 Uxtl(dst.fp().V8H(), dst.fp().V8B()); in LoadTransform()
1533 ld1r(dst.fp().V8H(), src_op); in LoadTransform()
2030 Smull2(tmp2, lhs.fp().V8H(), rhs.fp().V8H()); in emit_i32x4_dot_i16x8_s()
2036 Dup(dst.fp().V8H(), src.gp().W()); in emit_i16x8_splat()
2042 Umov(dst.gp().W(), lhs.fp().V8H(), imm_lane_idx); in emit_i16x8_extract_lane_u()
2048 Smov(dst.gp().W(), lhs.fp().V8H(), imm_lane_idx); in emit_i16x8_extract_lane_s()
2056 Mov(dst.fp().V8H(), src1.fp().V8H()); in emit_i16x8_replace_lane()
2058 Mov(dst.fp().V8H(), imm_lane_idx, src2.gp().W()); in emit_i16x8_replace_lane()
2063 Neg(dst.fp().V8H(), src.fp().V8H()); in emit_i16x8_neg()
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/external/vixl/benchmarks/aarch64/
Dbench-utils.cc379 __ Sqrshl(PickV().V8H(), PickV().V8H(), PickV().V8H()); in GenerateNEONSequence()
381 __ Sqdmlal2(PickV().V4S(), PickV().V8H(), PickV().V8H()); in GenerateNEONSequence()
397 __ Fmaxv(PickV().H(), PickV().V8H()); in GenerateNEONSequence()
/external/v8/src/compiler/backend/arm64/
Dcode-generator-arm64.cc2289 __ Smull2(tmp2, lhs.V8H(), rhs.V8H()); in AssembleArchInstruction()
2294 __ Dup(i.OutputSimd128Register().V8H(), i.InputRegister32(0)); in AssembleArchInstruction()
2298 __ Umov(i.OutputRegister32(), i.InputSimd128Register(0).V8H(), in AssembleArchInstruction()
2303 __ Smov(i.OutputRegister32(), i.InputSimd128Register(0).V8H(), in AssembleArchInstruction()
2308 VRegister dst = i.OutputSimd128Register().V8H(), in AssembleArchInstruction()
2309 src1 = i.InputSimd128Register(0).V8H(); in AssembleArchInstruction()
2318 ASSEMBLE_SIMD_SHIFT_LEFT(Shl, 4, V8H, Sshl, W); in AssembleArchInstruction()
2322 ASSEMBLE_SIMD_SHIFT_RIGHT(Sshr, 4, V8H, Sshl, W); in AssembleArchInstruction()
2336 __ Sqxtn2(dst.V8H(), src1.V4S()); in AssembleArchInstruction()
2351 VRegister dst = i.OutputSimd128Register().V8H(); in AssembleArchInstruction()
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/external/vixl/src/aarch64/
Doperands-aarch64.h371 VRegister V8H() const { return VRegister(code_, kQRegSize, 8); } in V8H() function
Dmacro-assembler-aarch64.cc1046 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xffff); in Movi32bitHelper()
/external/v8/src/codegen/arm64/
Dregister-arm64.h333 VRegister V8H() const { in V8H() function
Dmacro-assembler-arm64.cc435 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xFFFF); in Movi32bitHelper()
/external/webrtc/talk/media/testdata/
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