Searched refs:VGPU10_OPERAND_4_COMPONENT_MASK_X (Results 1 – 2 of 2) sorted by relevance
612 #define VGPU10_OPERAND_4_COMPONENT_MASK_X 0x1 macro617 #define VGPU10_OPERAND_4_COMPONENT_MASK_XY (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…618 #define VGPU10_OPERAND_4_COMPONENT_MASK_XZ (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…619 #define VGPU10_OPERAND_4_COMPONENT_MASK_XW (VGPU10_OPERAND_4_COMPONENT_MASK_X | VGPU10_OPERAND_…
1418 STATIC_ASSERT(TGSI_WRITEMASK_X == VGPU10_OPERAND_4_COMPONENT_MASK_X); in emit_dst_register()3994 writemask |= (VGPU10_OPERAND_4_COMPONENT_MASK_X << i); in output_writemask_for_stream()4067 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_gs_output_declarations()4075 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_gs_output_declarations()4141 operand0.mask = VGPU10_OPERAND_4_COMPONENT_MASK_X; in emit_tesslevel_declaration()4153 sgnName, VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_tesslevel_declaration()4408 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()4422 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()4437 VGPU10_OPERAND_4_COMPONENT_MASK_X, in emit_system_value_declaration()4739 mask = VGPU10_OPERAND_4_COMPONENT_MASK_X; in emit_fs_input_declarations()[all …]