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Searched refs:VIRGL_BIND_SAMPLER_STATES_START_SLOT (Results 1 – 4 of 4) sorted by relevance

/external/crosvm/gpu_renderer/src/generated/
Dvirgl_protocol.rs123 pub const VIRGL_BIND_SAMPLER_STATES_START_SLOT: u32 = 2; constant
/external/virglrenderer/src/
Dvirgl_protocol.h373 #define VIRGL_BIND_SAMPLER_STATES_START_SLOT 2 macro
Dvrend_decode.c988 uint32_t start_slot = get_buf_entry(ctx, VIRGL_BIND_SAMPLER_STATES_START_SLOT); in vrend_decode_bind_sampler_states()
/external/mesa3d/src/virtio/virtio-gpu/
Dvirgl_protocol.h386 #define VIRGL_BIND_SAMPLER_STATES_START_SLOT 2 macro