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Searched refs:VIRGL_CMD_RCR_SRC_W (Results 1 – 4 of 4) sorted by relevance

/external/crosvm/gpu_renderer/src/generated/
Dvirgl_protocol.rs140 pub const VIRGL_CMD_RCR_SRC_W: u32 = 11; constant
/external/virglrenderer/src/
Dvirgl_protocol.h403 #define VIRGL_CMD_RCR_SRC_W 11 macro
Dvrend_decode.c927 box.width = get_buf_entry(ctx, VIRGL_CMD_RCR_SRC_W); in vrend_decode_resource_copy_region()
/external/mesa3d/src/virtio/virtio-gpu/
Dvirgl_protocol.h416 #define VIRGL_CMD_RCR_SRC_W 11 macro