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Searched refs:VMEM (Results 1 – 13 of 13) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dspill-wide-sgpr.ll3 …spill-sgpr-to-vgpr=0 -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=VMEM %s
27 ; VMEM: buffer_store_dword
28 ; VMEM: buffer_store_dword
29 ; VMEM: s_cbranch_scc1
31 ; VMEM: buffer_load_dword
32 ; VMEM: buffer_load_dword
71 ; VMEM: buffer_store_dword
72 ; VMEM: buffer_store_dword
73 ; VMEM: buffer_store_dword
74 ; VMEM: buffer_store_dword
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Dcontrol-flow-fastregalloc.ll1 …=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=VMEM -check-prefix=GCN %s
29 ; VMEM: v_mov_b32_e32 v[[V_SAVEEXEC_LO:[0-9]+]], s[[SAVEEXEC_LO]]
30 ; VMEM: buffer_store_dword v[[V_SAVEEXEC_LO]], off, s[0:3], s7 offset:4 ; 4-byte Folded Spill
31 ; VMEM: v_mov_b32_e32 v[[V_SAVEEXEC_HI:[0-9]+]], s[[SAVEEXEC_HI]]
32 ; VMEM: buffer_store_dword v[[V_SAVEEXEC_HI]], off, s[0:3], s7 offset:8 ; 4-byte Folded Spill
52 ; VMEM: [[ENDIF]]:
60 ; VMEM: buffer_load_dword v[[V_RELOAD_SAVEEXEC_LO:[0-9]+]], off, s[0:3], s7 offset:4 ; 4-byte Folde…
61 ; VMEM: s_waitcnt vmcnt(0)
62 ; VMEM: v_readfirstlane_b32 s[[S_RELOAD_SAVEEXEC_LO:[0-9]+]], v[[V_RELOAD_SAVEEXEC_LO]]
64 ; VMEM: buffer_load_dword v[[V_RELOAD_SAVEEXEC_HI:[0-9]+]], off, s[0:3], s7 offset:8 ; 4-byte Folde…
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/external/mesa3d/src/amd/compiler/
DREADME-ISA.md61 ## VMEM stores
71 the registers used for a VMEM store's data. Experimentation has shown that this
166 VMEM/FLAT/GLOBAL/SCRATCH/DS instruction reads an SGPR (or EXEC, or M0).
225 VMEM/GLOBAL/SCRATCH instruction, then a branch, then a DS instruction,
226 or vice versa: DS instruction, then a branch, then a VMEM/GLOBAL/SCRATCH instruction.
/external/llvm/lib/Target/AMDGPU/
DGCNHazardRecognizer.cpp223 int GCNHazardRecognizer::checkVMEMHazards(MachineInstr* VMEM) { in checkVMEMHazards() argument
237 for (const MachineOperand &Use : VMEM->uses()) { in checkVMEMHazards()
DGCNHazardRecognizer.h44 int checkVMEMHazards(MachineInstr* VMEM);
DSIInsertWaits.cpp49 VMEM enumerator
318 if (LastOpcodeType == VMEM && Increment.Named.VM) { in pushInstruction()
328 LastOpcodeType = VMEM; in pushInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DGCNHazardRecognizer.h65 int checkVMEMHazards(MachineInstr* VMEM);
DGCNHazardRecognizer.cpp401 int GCNHazardRecognizer::checkVMEMHazards(MachineInstr* VMEM) { in checkVMEMHazards() argument
405 int WaitStatesNeeded = checkSoftClauseHazards(VMEM); in checkVMEMHazards()
412 for (const MachineOperand &Use : VMEM->uses()) { in checkVMEMHazards()
DAMDGPU.td107 // If XNACK is enabled, the VMEM latency can be worse.
/external/mesa3d/docs/relnotes/
D20.1.0.rst3584 - aco: use emit_load helper for VMEM/SMEM loads
4170 - aco: Introduce new VMEM load/store helpers.
4190 - aco: Store tess factors in VMEM only at the end of the shader.
4202 - aco: Allow combining TCS output VMEM stores.
4233 - aco: Only store TCS outputs to VMEM when they are read by TES.
D19.3.0.rst806 - aco: don't schedule instructions through depending VMEM instructions
2862 - aco: try to group together VMEM loads of the same resource
2873 - aco: add v_nop inbetween exec write and VMEM/DS/FLAT
D20.0.0.rst770 - aco: reorder VMEM operands in ACO IR
2794 - aco: add v_nop inbetween exec write and VMEM/DS/FLAT
D20.2.0.rst4306 - aco: allow to load/store 16-bit values in VMEM for tess and geom