Searched refs:WMSK_BIT (Results 1 – 10 of 10) sorted by relevance
38 #define SGRF_FAST_BOOT_DIS WMSK_BIT(8)40 #define SGRF_PCLK_WDT_UNGATE WMSK_BIT(6)56 #define SGRF_SLV_SEC_NO_BYPS WMSK_BIT(15)67 #define SGRF_DDR_RGN_NO_BYPS WMSK_BIT(15)71 #define SGRF_DAPDEVICE_MSK WMSK_BIT(0)
23 mmio_write_32(SGRF_BASE + SGRF_PMU_CON(0), WMSK_BIT(7)); in m0_init()24 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(6), WMSK_BIT(12)); in m0_init()40 mmio_write_32(PMUCRU_BASE + PMUCRU_CLKGATE_CON2, WMSK_BIT(5)); in m0_init()
65 #define CCI_FORCE_WAKEUP WMSK_BIT(8)66 #define EXTERNAL_32K WMSK_BIT(0)
844 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(3), WMSK_BIT(1)); in sys_slp_config()1463 WMSK_BIT(PMU_CLR_PREQ_CCI500_HW) | in rockchip_soc_sys_pwr_dm_resume()1464 WMSK_BIT(PMU_CLR_QREQ_CCI500_HW) | in rockchip_soc_sys_pwr_dm_resume()1465 WMSK_BIT(PMU_QGATING_CCI500_CFG)); in rockchip_soc_sys_pwr_dm_resume()1471 WMSK_BIT(PMU_PWRDWN_REQ_CORE_B_2GIC_SW) | in rockchip_soc_sys_pwr_dm_resume()1472 WMSK_BIT(PMU_PWRDWN_REQ_CORE_B_SW) | in rockchip_soc_sys_pwr_dm_resume()1473 WMSK_BIT(PMU_PWRDWN_REQ_GIC2_CORE_B_SW) | in rockchip_soc_sys_pwr_dm_resume()1474 WMSK_BIT(PMU_CLR_CORE_L_HW) | in rockchip_soc_sys_pwr_dm_resume()1475 WMSK_BIT(PMU_CLR_CORE_L_2GIC_HW) | in rockchip_soc_sys_pwr_dm_resume()1476 WMSK_BIT(PMU_CLR_GIC2_CORE_L_HW)); in rockchip_soc_sys_pwr_dm_resume()
36 #define SGRF_PMU_SLV_S_CFGED WMSK_BIT(0)37 #define SGRF_PMU_SLV_CRYPTO1_NS WMSK_BIT(1)52 #define SGRF_DDR_RGN_NO_BYPS WMSK_BIT(9)
105 WMSK_BIT(PCLK_WDT_CA53_GATE_SHIFT) | in secure_watchdog_ungate()106 WMSK_BIT(PCLK_WDT_CM0_GATE_SHIFT)); in secure_watchdog_ungate()
42 #define PLL_NO_BYPASS_MODE WMSK_BIT(PLL_BYPASS_SHIFT)180 #define CRU_DMAC0_RST_RLS WMSK_BIT(3)184 #define CRU_DMAC1_RST_RLS WMSK_BIT(4)202 #define CRU_PMU_SGRF_RST_RLS WMSK_BIT(6)
51 #ifndef WMSK_BIT52 #define WMSK_BIT(nr) BIT((nr) + REG_MSK_SHIFT) macro57 #define BIT_WITH_WMSK(nr) (BIT(nr) | WMSK_BIT(nr))
45 #define PRESET_GPIO0_HOLD(n) (((n) << 7) | WMSK_BIT(7))46 #define PRESET_GPIO1_HOLD(n) (((n) << 8) | WMSK_BIT(8))
500 mmio_write_32(DDR_GRF_BASE, BIT_WITH_WMSK(14) | WMSK_BIT(15)); in ddr_suspend()