Searched refs:WORD_SHIFT (Results 1 – 5 of 5) sorted by relevance
37 #define WORD_SHIFT U(2) macro44 #define CTX_REG_ALL (CTX_REGS_END >> WORD_SHIFT)50 #define read_ctx_reg(ctx, offset) ((ctx)->_regs[offset >> WORD_SHIFT])51 #define write_ctx_reg(ctx, offset, val) (((ctx)->_regs[offset >> WORD_SHIFT]) \
21 #define WORD_SHIFT (32U) macro42 #define CTL_INT_MASK_ALL ((uint32_t)LPDDR4_LOR_BITS - WORD_SHIFT)
398 *mmrvalue = (uint64_t) ((*mmrvalue << WORD_SHIFT) | lowerdata); in lpddr4_checkmmrreaderror()659 *mask = (uint64_t) ((*mask << WORD_SHIFT) | lowermask); in lpddr4_getctlinterruptmask()693 regval = (uint32_t) ((*mask >> WORD_SHIFT) & WORD_MASK); in lpddr4_setctlinterruptmask()718 if ((uint32_t) intr >= WORD_SHIFT) { in lpddr4_checkctlinterrupt()724 fieldshift = (uint32_t) intr - ((uint32_t) WORD_SHIFT); in lpddr4_checkctlinterrupt()735 if (fieldshift < WORD_SHIFT) { in lpddr4_checkctlinterrupt()760 if (localinterrupt > WORD_SHIFT) { in lpddr4_ackctlinterrupt()762 (localinterrupt - (uint32_t) WORD_SHIFT); in lpddr4_ackctlinterrupt()803 if ((result == (uint32_t) CDN_EOK) && (ui32irqcount < WORD_SHIFT)) { in lpddr4_setphyindepinterruptmask()833 if ((result == (uint32_t) CDN_EOK) && ((uint32_t) intr < WORD_SHIFT)) { in lpddr4_checkphyindepinterrupt()[all …]
12 #define WORD_SHIFT 32 macro
200 WORD_SHIFT)); in sec_firmware_check_copy_loadable()