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Searched refs:XIIC_SR_REG_OFFSET (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/drivers/i2c/
Dxilinx_xiic.c32 #define XIIC_SR_REG_OFFSET (0x04+XIIC_REG_OFFSET) /* Status Register */ macro
114 ret = wait_for_bit_8(priv->base + XIIC_SR_REG_OFFSET, in xiic_read_rx()
223 ret = wait_for_bit_8(priv->base + XIIC_SR_REG_OFFSET, in xilinx_xiic_write_common()
239 for (sr = readb(priv->base + XIIC_SR_REG_OFFSET); in xiic_clear_rx_fifo()
241 sr = readb(priv->base + XIIC_SR_REG_OFFSET)) in xiic_clear_rx_fifo()
272 ret = wait_for_bit_8(priv->base + XIIC_SR_REG_OFFSET, in xilinx_xiic_xfer()
305 ret = wait_for_bit_8(priv->base + XIIC_SR_REG_OFFSET, in xilinx_xiic_probe_chip()