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Searched refs:_shift (Results 1 – 22 of 22) sorted by relevance

/external/libopus/celt/
Dmdct.h86 #define clt_mdct_forward(_l, _in, _out, _window, _overlap, _shift, _stride, _arch) \ argument
88 _window, _overlap, _shift, \
96 #define clt_mdct_backward(_l, _in, _out, _window, _overlap, _shift, _stride, _arch) \ argument
98 _window, _overlap, _shift, \
103 #define clt_mdct_forward(_l, _in, _out, _window, _overlap, _shift, _stride, _arch) \ argument
104 clt_mdct_forward_c(_l, _in, _out, _window, _overlap, _shift, _stride, _arch)
106 #define clt_mdct_backward(_l, _in, _out, _window, _overlap, _shift, _stride, _arch) \ argument
107 clt_mdct_backward_c(_l, _in, _out, _window, _overlap, _shift, _stride, _arch)
/external/u-boot/drivers/clk/mediatek/
Dclk-mtk.h113 #define MUX_GATE_FLAGS(_id, _parents, _reg, _shift, _width, _gate, \ argument
117 .mux_shift = _shift, \
126 #define MUX_GATE(_id, _parents, _reg, _shift, _width, _gate) \ argument
127 MUX_GATE_FLAGS(_id, _parents, _reg, _shift, _width, _gate, 0)
129 #define MUX(_id, _parents, _reg, _shift, _width) { \ argument
132 .mux_shift = _shift, \
Dclk-mt7629.c425 #define GATE_INFRA(_id, _parent, _shift) { \ argument
429 .shift = _shift, \
454 #define GATE_PERI0(_id, _parent, _shift) { \ argument
458 .shift = _shift, \
462 #define GATE_PERI1(_id, _parent, _shift) { \ argument
466 .shift = _shift, \
499 #define GATE_ETH(_id, _parent, _shift, _flag) { \ argument
503 .shift = _shift, \
507 #define GATE_ETH0(_id, _parent, _shift) \ argument
508 GATE_ETH(_id, _parent, _shift, CLK_PARENT_APMIXED)
[all …]
Dclk-mt8516.c577 #define GATE_TOP0(_id, _parent, _shift) { \ argument
581 .shift = _shift, \
585 #define GATE_TOP1(_id, _parent, _shift) { \ argument
589 .shift = _shift, \
593 #define GATE_TOP2(_id, _parent, _shift) { \ argument
597 .shift = _shift, \
601 #define GATE_TOP2_I(_id, _parent, _shift) { \ argument
605 .shift = _shift, \
609 #define GATE_TOP3(_id, _parent, _shift) { \ argument
613 .shift = _shift, \
[all …]
Dclk-mt8518.c1300 #define GATE_TOP0(_id, _parent, _shift) { \ argument
1304 .shift = _shift, \
1308 #define GATE_TOP1(_id, _parent, _shift) { \ argument
1312 .shift = _shift, \
1316 #define GATE_TOP2(_id, _parent, _shift) { \ argument
1320 .shift = _shift, \
1324 #define GATE_TOP2_I(_id, _parent, _shift) { \ argument
1328 .shift = _shift, \
1332 #define GATE_TOP3(_id, _parent, _shift) { \ argument
1336 .shift = _shift, \
[all …]
Dclk-mt7623.c588 #define GATE_INFRA(_id, _parent, _shift) { \ argument
592 .shift = _shift, \
630 #define GATE_PERI0(_id, _parent, _shift) { \ argument
634 .shift = _shift, \
638 #define GATE_PERI1(_id, _parent, _shift) { \ argument
642 .shift = _shift, \
699 #define GATE_ETH_HIF(_id, _parent, _shift, _flag) { \ argument
703 .shift = _shift, \
707 #define GATE_ETH_HIF0(_id, _parent, _shift) \ argument
708 GATE_ETH_HIF(_id, _parent, _shift, CLK_PARENT_APMIXED)
[all …]
/external/libopus/celt/arm/
Dmdct_arm.h52 #define clt_mdct_forward(_l, _in, _out, _window, _int, _shift, _stride, _arch) \ argument
53 clt_mdct_forward_neon(_l, _in, _out, _window, _int, _shift, _stride, _arch)
54 #define clt_mdct_backward(_l, _in, _out, _window, _int, _shift, _stride, _arch) \ argument
55 clt_mdct_backward_neon(_l, _in, _out, _window, _int, _shift, _stride, _arch)
/external/arm-trusted-firmware/include/arch/aarch64/
Dasm_macros.S135 .macro _mov_imm16 _reg, _val, _shift argument
136 .if (\_val >> \_shift) & 0xffff
137 .if (\_val & (1 << \_shift - 1))
138 movk \_reg, (\_val >> \_shift) & 0xffff, LSL \_shift
140 mov \_reg, \_val & (0xffff << \_shift)
/external/u-boot/arch/arm/cpu/armv7/bcm235xx/
Dclk-core.h298 #define DIVIDER(_offset, _shift, _width) \ argument
301 .shift = (_shift), \
308 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument
311 .shift = (_shift), \
349 #define SELECTOR(_offset, _shift, _width) \ argument
352 .shift = (_shift), \
/external/u-boot/arch/arm/cpu/armv7/bcm281xx/
Dclk-core.h298 #define DIVIDER(_offset, _shift, _width) \ argument
301 .shift = (_shift), \
308 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument
311 .shift = (_shift), \
349 #define SELECTOR(_offset, _shift, _width) \ argument
352 .shift = (_shift), \
/external/libaom/libaom/aom_dsp/
Dpsnrhvs.c115 uint32_t _shift, int buf_is_hbd, int16_t pix_max, in calc_psnrhvs() argument
142 sum1 += _src16[y * _systride + x] >> _shift; in calc_psnrhvs()
143 sum2 += _dst16[y * _dystride + x] >> _shift; in calc_psnrhvs()
189 dct_s[i * 8 + j] = _src16[(y + i) * _systride + (j + x)] >> _shift; in calc_psnrhvs()
190 dct_d[i * 8 + j] = _dst16[(y + i) * _dystride + (j + x)] >> _shift; in calc_psnrhvs()
Dfastssim.c444 uint32_t _shift, int buf_is_hbd) { in calc_ssim() argument
450 fs_downsample_level0(&ctx, _src, _systride, _dst, _dystride, _w, _h, _shift, in calc_ssim()
/external/u-boot/drivers/pinctrl/mtmips/
Dpinctrl-mtmips-common.h41 #define GRP(_name, _funcs, _reg, _shift, _mask) \ argument
42 { .name = (_name), .reg = (_reg), .shift = (_shift), .mask = (_mask), \
/external/libvpx/libvpx/vpx_dsp/
Dpsnrhvs.c123 uint32_t bit_depth, uint32_t _shift) { in calc_psnrhvs() argument
183 if (bit_depth == 8 && _shift == 0) { in calc_psnrhvs()
187 dct_s[i * 8 + j] = _src16[(y + i) * _systride + (j + x)] >> _shift; in calc_psnrhvs()
188 dct_d[i * 8 + j] = _dst16[(y + i) * _dystride + (j + x)] >> _shift; in calc_psnrhvs()
Dfastssim.c454 uint32_t _shift) { in calc_ssim() argument
461 _shift); in calc_ssim()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SchedFalkorDetails.td601 def : InstRW<[FalkorWr_1VXVY_4cyc], (instregex "^FCVTZ(S|U)v2i32(_shift)?$")>;
627 def : InstRW<[FalkorWr_2VXVY_4cyc], (instregex "^FCVTZ(S|U)(v2i64|v4i32)(_shift)?$")>;
668 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^(S|U)SHR(v2i32|v4i16|v8i8)_shift$")>;
675 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^SHL(v2i32|v4i16|v8i8)_shift$")>;
679 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^(S|U)R?SRA(d|(v2i32|v4i16|v8i8)_shift)$")>;
683 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^(S|U)QSHLU?(d|s|h|b|(v8i8|v4i16|v2i32)_shift)$")…
688 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^(S|U)RSHR(v2i32|v4i16|v8i8)_shift$")>;
690 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^R?SHRN(v2i32|v4i16|v8i8)_shift$")>;
694 def : InstRW<[FalkorWr_1VXVY_3cyc], (instregex "^S(L|R)I(d|(v8i8|v4i16|v2i32)_shift)$")>;
720 …6cyc], (instregex "^(SQR?SHRN|UQR?SHRN|SQR?SHRUN)(v8i8|v16i8|v4i16|v8i16|v2i32|v4i32)_shift?$")>;
[all …]
DAArch64SchedKryoDetails.td20 (instregex "(S|U)R?SRA(d|(v2i32|v4i16|v8i8)_shift)")>;
27 (instregex "(S|U)R?SRA(v2i64|v4i32|v8i16|v16i8)_shift")>;
148 (instregex "(S|U)CVTF(v1i32|v2i32|v1i64|v2f32|d|s)(_shift)?")>;
154 (instregex "(S|U)CVTF(v2i64|v4i32|v2f64|v4f32)(_shift)?")>;
220 (instregex "(S|U)QSHLU?(d|s|h|b|(v8i8|v4i16|v2i32)_shift)$")>;
226 (instregex "(S|U)(QSHLU?|RSHR)(v16i8|v8i16|v4i32|v2i64)_shift$")>;
244 (instregex "((S|U)QR?SHRN|SQR?SHRUN)(v16i8|v8i16|v4i32)_shift$")>;
256 (instregex "((S|U)QR?SHRN|SQR?SHRUN)(v8i8|v4i16|v2i32)_shift?")>;
280 (instregex "(S|U)RSHR(d|(v8i8|v4i16|v2i32)_shift)$")>;
298 (instregex "(S|U)?SHLL(v16i8|v8i16|v4i32|v8i8|v4i16|v2i32)(_shift)?$")>;
[all …]
/external/u-boot/arch/arm/mach-tegra/tegra124/
Dxusb-padctl.c82 #define TEGRA124_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument
86 .shift = _shift, \
/external/u-boot/arch/arm/mach-tegra/tegra210/
Dxusb-padctl.c62 #define TEGRA210_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument
66 .shift = _shift, \
/external/llvm/lib/Target/AArch64/
DAArch64SchedKryoDetails.td20 (instregex "(S|U)R?SRA(d|(v2i32|v4i16|v8i8)_shift)")>;
27 (instregex "(S|U)R?SRA(v2i64|v4i32|v8i16|v16i8)_shift")>;
148 (instregex "(S|U)CVTF(v1i32|v2i32|v1i64|v2f32|d|s)(_shift)?")>;
154 (instregex "(S|U)CVTF(v2i64|v4i32|v2f64|v4f32)(_shift)?")>;
220 (instregex "(S|U)QSHLU?(d|s|h|b|(v8i8|v4i16|v2i32)_shift)$")>;
226 (instregex "(S|U)(QSHLU?|RSHR)(v16i8|v8i16|v4i32|v2i64)_shift$")>;
244 (instregex "((S|U)QR?SHRN|SQR?SHRUN)(v16i8|v8i16|v4i32)_shift$")>;
256 (instregex "((S|U)QR?SHRN|SQR?SHRUN)(v8i8|v4i16|v2i32)_shift?")>;
280 (instregex "(S|U)RSHR(d|(v8i8|v4i16|v2i32)_shift)$")>;
298 (instregex "(S|U)?SHLL(v16i8|v8i16|v4i32|v8i8|v4i16|v2i32)(_shift)?$")>;
[all …]
/external/boringssl/src/include/openssl/
Dstack.h361 OPENSSL_INLINE ptrtype sk_##name##_shift(STACK_OF(name) *sk) { \
/external/tensorflow/tensorflow/python/data/ops/
Ddataset_ops.py4172 self._shift = ops.convert_to_tensor(shift, dtype=dtypes.int64, name="shift")
4190 self._shift,