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/external/boringssl/src/crypto/fipsmodule/bn/asm/
Darmv8-mont.pl279 my ($acc0,$acc1,$acc2,$acc3,$acc4,$acc5,$acc6,$acc7)=map("x$_",(19..26));
327 mov $acc0,xzr
388 stp $acc0,$acc1,[$tp],#8*2 // t[0..1]
389 adc $acc0,xzr,xzr // t[8]
402 adc $acc0,$acc0,$t1
415 adcs $acc0,$acc0,$t3
427 adcs $acc0,$acc0,$t0
438 adcs $acc0,$acc0,$t1
448 adcs $acc0,$acc0,$t1
457 adcs $acc0,$acc0,$t1
[all …]
Dx86-mont.pl141 $acc0="mm0"; # mmx register bank layout
170 &movq ($acc0,$mul1); # I wish movd worked for
171 &pand ($acc0,$mask); # inter-register transfers
176 &paddq ($car1,$acc0);
179 &movd ($acc0,&DWP(4,$ap)); # ap[1]
186 &pmuludq($acc0,$mul0); # ap[j]*bp[0]
188 &paddq ($car0,$acc0); # +=c0
191 &movq ($acc0,$car0);
192 &pand ($acc0,$mask);
194 &paddq ($car1,$acc0); # +=ap[j]*bp[0];
[all …]
/external/boringssl/src/crypto/fipsmodule/ec/asm/
Dp256-x86_64-asm.pl151 my ($acc0,$acc1,$acc2,$acc3,$acc4,$acc5,$acc6,$acc7)=map("%r$_",(8..15));
198 mov %rax, $acc0
213 mov $acc0, $acc5
214 imulq %r15,$acc0
219 mov $acc0, %rax
225 mov $acc0, $t1
227 mov $acc0, %rax
231 sub $acc0, $acc2
232 sbb \$0, $acc0 # can't borrow
241 adc \$0, $acc0 # can't overflow
[all …]
/external/tensorflow/tensorflow/lite/kernels/internal/optimized/
Ddepthwiseconv_uint8_transitional.h3369 int32x4_t acc0;
3374 acc0 = adjusted_bias_data;
3379 acc0 = vdotq_s32(acc0, filter_reg_2_a, left_bank_2_reg);
3390 acc0 = vdotq_s32(acc0, filter_reg_0_a, left_bank_0_reg);
3391 acc0 = vdotq_s32(acc0, filter_reg_1_a, left_bank_1_reg);
3400 acc0 = vqrdmulhq_n_s32(acc0, output_multiplier);
3401 acc0 = DivideByPOT<DepthwiseConvOutputRounding::kUpward>::Run(
3402 acc0, -output_shift);
3414 vcombine_s16(vqmovn_s32(acc0), vqmovn_s32(acc1));
3457 acc0 = adjusted_bias_data;
[all …]
/external/boringssl/src/crypto/fipsmodule/aes/asm/
Daes-x86_64.pl60 $acc0="%esi"; $mask80="%rsi";
103 movzb `&lo("$s0")`,$acc0
106 mov 0($sbox,$acc0,8),$t0
110 movzb `&hi("$s1")`,$acc0
113 xor 3($sbox,$acc0,8),$t0
117 movzb `&hi("$s3")`,$acc0
120 xor 3($sbox,$acc0,8),$t2
128 movzb `&lo("$s2")`,$acc0
131 xor 2($sbox,$acc0,8),$t0
135 movzb `&hi("$s3")`,$acc0
[all …]
/external/sonivox/arm-wt-22k/lib_src/
Deas_wtengine.c186 EAS_I32 acc0; in WT_Interpolate() local
222 acc0 = samp2 - samp1; in WT_Interpolate()
223 acc0 = acc0 * phaseFrac; in WT_Interpolate()
225 acc0 = samp1 + (acc0 >> NUM_PHASE_FRAC_BITS); in WT_Interpolate()
229 *pOutputBuffer++ = (EAS_I16)(acc0 >> 2); in WT_Interpolate()
234 acc0 = phaseFrac >> NUM_PHASE_FRAC_BITS; in WT_Interpolate()
237 if (acc0 > 0) { in WT_Interpolate()
240 pSamples += acc0; in WT_Interpolate()
244 acc0 = (EAS_I32) (pSamples - loopEnd); in WT_Interpolate()
245 if (acc0 >= 0) in WT_Interpolate()
[all …]
/external/igt-gpu-tools/lib/i915/shaders/ps/
Dblit.g11a5 (W) mad(8|M0) acc0.0<1>:nf r6.7<0;0>:f r2.0<8;1>:f r6.0<0>:f
6 (W) mad(8|M0) r10.0<1>:f acc0.0<8;1>:nf r3.0<8;1>:f r6.1<0>:f
8 (W) mad(8|M0) acc0.0<1>:nf r6.0<0;0>:f r4.0<8;1>:f r6.0<0>:f
9 (W) mad(8|M0) r11.0<1>:f acc0.0<8;1>:nf r5.0<8;1>:f r6.1<0>:f
11 (W) mad(8|M0) acc0.0<1>:nf r6.4<0;0>:f r2.0<8;1>:f r6.4<0>:f
12 (W) mad(8|M0) r12.0<1>:f acc0.0<8;1>:nf r3.0<8;1>:f r6.5<0>:f
14 (W) mad(8|M0) acc0.0<1>:nf r6.0<0;0>:f r4.0<8;1>:f r6.4<0>:f
15 (W) mad(8|M0) r13.0<1>:f acc0.0<8;1>:nf r5.0<8;1>:f r6.5<0>:f
/external/mesa3d/src/intel/tools/tests/gen7/
Dmul.asm5 mul(8) acc0<1>D g5.4<0>.zwwwD g6<0>.xyyyD { align16 1Q };
21 mul(8) acc0<1>UD g10<8,8,1>UD 0xaaaaaaabUD { align1 1Q };
22 mul(8) acc0<1>D g10<8,8,1>D 1431655766D { align1 1Q };
23 mul(8) acc0<1>UD g23<8,8,1>UD 0xaaaaaaabUD { align1 2Q };
24 mul(8) acc0<1>D g23<8,8,1>D 1431655766D { align1 2Q };
32 mul(8) acc0<1>D g1<4>.xD 741092396D { align16 1Q };
33 mul(8) acc0<1>UD g4<8,8,1>UD g8<8,8,1>UD { align1 1Q };
34 mul(8) acc0<1>UD g5<8,8,1>UD g13<8,8,1>UD { align1 2Q };
35 mul(8) acc0<1>D g5<8,8,1>D g9<8,8,1>D { align1 1Q };
36 mul(8) acc0<1>D g6<8,8,1>D g14<8,8,1>D { align1 2Q };
[all …]
/external/tensorflow/tensorflow/lite/kernels/
Dcpu_backend_gemm_custom_gemv.h357 int32x4_t acc0 = vdupq_n_s32(0);
358 int32x4_t acc1 = acc0;
359 int32x4_t acc2 = acc0;
360 int32x4_t acc3 = acc0;
388 acc0 = vmlal_s16(acc0, vget_low_s16(filter_val_0.val[0]),
396 acc0 = vmlal_s16(acc0, vget_low_s16(filter_val_0.val[1]),
404 acc0 = vmlal_s16(acc0, vget_high_s16(filter_val_0.val[0]),
412 acc0 = vmlal_s16(acc0, vget_high_s16(filter_val_0.val[1]),
434 acc0 = vmlal_s16(acc0, vget_low_s16(filter_val_0),
442 acc0 = vmlal_s16(acc0, vget_high_s16(filter_val_0),
[all …]
/external/mesa3d/src/intel/tools/tests/gen7.5/
Dmul.asm6 mul(8) acc0<1>UD g17<8,8,1>UD 0xaaaaaaabUD { align1 1Q };
7 mul(8) acc0<1>D g17<8,8,1>D 1431655766D { align1 1Q };
10 mul(8) acc0<1>UD g84<8,8,1>UD 0xaaaaaaabUD { align1 2Q };
12 mul(8) acc0<1>D g84<8,8,1>D 1431655766D { align1 2Q };
14 mul(8) acc0<1>D g1<0>.xyzzD g1<0>.wD { align16 1Q };
22 mul(8) acc0<1>UD g9<4>UD g11<4>UD { align16 1Q };
23 mul(8) acc0<1>UD g4<8,8,1>UD g8<8,8,1>UD { align1 1Q };
24 mul(8) acc0<1>UD g5<8,8,1>UD g13<8,8,1>UD { align1 2Q };
31 mul(8) acc0<1>UD g5<4>.xUD 0xaaaaaaabUD { align16 1Q };
32 mul(8) acc0<1>D g5<4>.xD 1431655766D { align16 1Q };
[all …]
/external/mesa3d/src/intel/tools/tests/gen6/
Dmul.asm20 mul(8) acc0<1>UD g10<8,8,1>UD 0xaaaaaaabUD { align1 1Q };
21 mul(8) acc0<1>D g10<8,8,1>D 1431655766D { align1 1Q };
23 mul(16) acc0<1>UD g14<8,8,1>UD 0xaaaaaaabUD { align1 1H };
24 mul(16) acc0<1>D g14<8,8,1>D 1431655766D { align1 1H };
29 mul(8) acc0<1>D g1<0>D g1.4<0>D { align16 1Q };
34 mul(8) acc0<1>D g1<4>.xD 741092396D { align16 1Q };
35 mul(8) acc0<1>UD g4<8,8,1>UD g8<8,8,1>UD { align1 1Q };
36 mul(16) acc0<1>UD g4<8,8,1>UD g12<8,8,1>UD { align1 1H };
40 mul(8) acc0<1>D g5<8,8,1>D g9<8,8,1>D { align1 1Q };
41 mul(16) acc0<1>D g5<8,8,1>D g13<8,8,1>D { align1 1H };
[all …]
/external/deqp-deps/glslang/Test/baseResults/
DrayQuery.rgen.out21 Name 21 "acc0"
26 Decorate 21(acc0) DescriptorSet 0
27 Decorate 21(acc0) Binding 0
44 21(acc0): 20(ptr) Variable UniformConstant
64 22: 19 Load 21(acc0)
/external/angle/third_party/glslang/src/Test/baseResults/
DrayQuery.rgen.out21 Name 21 "acc0"
26 Decorate 21(acc0) DescriptorSet 0
27 Decorate 21(acc0) Binding 0
44 21(acc0): 20(ptr) Variable UniformConstant
64 22: 19 Load 21(acc0)
/external/boringssl/src/crypto/cipher_extra/asm/
Dchacha20_poly1305_x86_64.pl85 my ($acc0,$acc1,$acc2)=map("%r$_",(10..12));
132 $code.="add $src, $acc0
140 mul $acc0
153 mul $acc0
156 mov %rdx, $acc0
165 add $acc0, $t2
170 $code.="mov $t0, $acc0
179 add $t0, $acc0
182 add $t2, $acc0
377 xor $acc0, $acc0
[all …]
/external/libaom/libaom/av1/encoder/mips/msa/
Dtemporal_filter_msa.c31 v4i32 acc0, acc1, acc2, acc3; in temporal_filter_apply_8size_msa() local
46 LD_SW2(acc, 4, acc0, acc1); in temporal_filter_apply_8size_msa()
87 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w, in temporal_filter_apply_8size_msa()
95 LD_SW2(acc, 4, acc0, acc1); in temporal_filter_apply_8size_msa()
133 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w, in temporal_filter_apply_8size_msa()
157 v4i32 acc0, acc1, acc2, acc3; in temporal_filter_apply_16size_msa() local
172 LD_SW2(acc, 4, acc0, acc1); in temporal_filter_apply_16size_msa()
211 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w, in temporal_filter_apply_16size_msa()
219 LD_SW2(acc, 4, acc0, acc1); in temporal_filter_apply_16size_msa()
258 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w, in temporal_filter_apply_16size_msa()
/external/libvpx/libvpx/vp8/encoder/mips/msa/
Dtemporal_filter_msa.c27 v4i32 acc0, acc1, acc2, acc3; in temporal_filter_apply_16size_msa() local
41 LD_SW2(acc, 4, acc0, acc1); in temporal_filter_apply_16size_msa()
74 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w, in temporal_filter_apply_16size_msa()
79 LD_SW2(acc, 4, acc0, acc1); in temporal_filter_apply_16size_msa()
113 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w, in temporal_filter_apply_16size_msa()
140 v4i32 acc0, acc1, acc2, acc3; in temporal_filter_apply_8size_msa() local
157 LD_SW2(acc, 4, acc0, acc1); in temporal_filter_apply_8size_msa()
195 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w, in temporal_filter_apply_8size_msa()
201 LD_SW2(acc, 4, acc0, acc1); in temporal_filter_apply_8size_msa()
235 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w, in temporal_filter_apply_8size_msa()
/external/mesa3d/src/intel/tools/tests/gen5/
Dmul.asm18 mul(8) acc0<1>UD g2<8,8,1>UD 0xaaaaaaabUD { align1 };
20 mul(8) acc0<1>D g2<8,8,1>D 1431655766D { align1 };
21 mul(16) acc0<1>UD g12<8,8,1>UD 0xaaaaaaabUD { align1 compr };
23 mul(16) acc0<1>D g12<8,8,1>D 1431655766D { align1 compr };
/external/mesa3d/src/intel/tools/tests/gen8/
Dmul.asm5 mul(8) acc0<1>UD g17<8,8,1>UD 0xaaabUW { align1 1Q };
6 mul(8) acc0<1>D g17<8,8,1>D 0x5556UW { align1 1Q };
8 mul(8) acc0<1>UD g47<8,8,1>UD 0xaaabUW { align1 2Q };
10 mul(8) acc0<1>D g47<8,8,1>D 0x5556UW { align1 2Q };
/external/mesa3d/src/intel/tools/tests/gen9/
Dmul.asm5 mul(8) acc0<1>UD g17<8,8,1>UD 0xaaabUW { align1 1Q };
6 mul(8) acc0<1>D g17<8,8,1>D 0x5556UW { align1 1Q };
8 mul(8) acc0<1>UD g39<8,8,1>UD 0xaaabUW { align1 2Q };
10 mul(8) acc0<1>D g39<8,8,1>D 0x5556UW { align1 2Q };
/external/deqp-deps/glslang/Test/
DrayQuery.rgen4 layout(binding = 0, set = 0) uniform accelerationStructureEXT acc0;
18 rayQueryInitializeEXT(localRayQuery, acc0, rayFlags, 0xFF , origin, tMin, dir, tMax);
/external/angle/third_party/glslang/src/Test/
DrayQuery.rgen4 layout(binding = 0, set = 0) uniform accelerationStructureEXT acc0;
18 rayQueryInitializeEXT(localRayQuery, acc0, rayFlags, 0xFF , origin, tMin, dir, tMax);
/external/igt-gpu-tools/lib/i915/shaders/media/
Dmedia_fill.gxa32 send(16) 4 acc0<1>UW null write(0, 0, 10, 12) mlen 9 rlen 0 {align1};
40 /* send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1}; */
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dframe-20.ll80 %acc0 = fsub double %l0, %l0
81 %acc1 = fsub double %l1, %acc0
112 store volatile double %acc0, double *%ptr
209 %acc0 = fsub double %l0, %l0
210 %acc1 = fsub double %l1, %acc0
240 store volatile double %acc0, double *%ptr
311 %acc0 = fsub double %l0, %l0
312 %acc1 = fsub double %l1, %acc0
336 store volatile double %acc0, double *%ptr
396 %acc0 = fsub double %l0, %l0
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dframe-20.ll80 %acc0 = fsub double %l0, %l0
81 %acc1 = fsub double %l1, %acc0
112 store volatile double %acc0, double *%ptr
209 %acc0 = fsub double %l0, %l0
210 %acc1 = fsub double %l1, %acc0
240 store volatile double %acc0, double *%ptr
311 %acc0 = fsub double %l0, %l0
312 %acc1 = fsub double %l1, %acc0
336 store volatile double %acc0, double *%ptr
396 %acc0 = fsub double %l0, %l0
[all …]
/external/mesa3d/src/intel/compiler/
Dtest_eu_validate.cpp121 #define acc0 brw_acc_reg(8) macro
1599 retype(inst[i].read_acc ? acc0 : g0, inst[i].src0_type), in TEST_P()
1681 retype(inst[i].read_acc ? acc0: g0, inst[i].src0_type), in TEST_P()
1990 retype(inst[i].read_acc ? acc0 : g0, inst[i].src0_type), in TEST_P()
2505 INST(MOV, 4, acc0, F, 1, g0, F, 4, 4, 1, 0, true ), in TEST_P()
2506 INST(MOV, 4, g0, F, 1, acc0, F, 4, 4, 1, 0, true ), in TEST_P()
2509 INST(MOV, 4, acc0, D, 1, g0, D, 4, 4, 1, 0, true ), in TEST_P()
2510 INST(MOV, 4, g0, D, 1, acc0, D, 4, 4, 1, 0, true ), in TEST_P()
2513 INST(MOV, 4, acc0, UD, 1, g0, UD, 4, 4, 1, 0, true ), in TEST_P()
2514 INST(MOV, 4, g0, UD, 1, acc0, UD, 4, 4, 1, 0, true ), in TEST_P()
[all …]

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