| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| D | address-mode-global.ll | 12 %addr_hi.int = add i32 4, %base
14 %addr_hi.ptr = inttoptr i32 %addr_hi.int to i32*
16 %addr_hi.load = load i32, i32* %addr_hi.ptr, align 1
17 %result = add i32 %addr_lo.load, %addr_hi.load
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| /external/u-boot/include/fsl-mc/ |
| D | fsl_dpaa_fd.h | 18 u32 addr_hi; member
40 return (u64)((((uint64_t)fd->simple.addr_hi) << 32) in ldpaa_fd_get_addr()
46 fd->simple.addr_hi = upper_32_bits(addr); in ldpaa_fd_set_addr()
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| D | fsl_qbman_base.h | 72 uint32_t addr_hi; member
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| /external/u-boot/drivers/usb/eth/ |
| D | lan75xx.c | 137 u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]); in lan75xx_write_hwaddr() local
145 ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi); in lan75xx_write_hwaddr()
153 addr_hi |= LAN75XX_ADDR_FILTX_FB_VALID; in lan75xx_write_hwaddr()
154 ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX, addr_hi); in lan75xx_write_hwaddr()
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| D | lan78xx.c | 309 u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]); in lan78xx_write_hwaddr() local
317 ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi); in lan78xx_write_hwaddr()
326 addr_hi | LAN78XX_MAF_HI_VALID); in lan78xx_write_hwaddr()
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| D | smsc95xx.c | 394 u32 addr_hi = get_unaligned_le16(&enetaddr[4]); in smsc95xx_write_hwaddr_common() local
403 ret = smsc95xx_write_reg(udev, ADDRH, addr_hi); in smsc95xx_write_hwaddr_common()
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| /external/u-boot/drivers/crypto/fsl/ |
| D | jr.c | 193 uint32_t *addr_hi, *addr_lo; in jr_enqueue() local
226 addr_hi = (uint32_t *)(&jr->input_ring[head]) + 1; in jr_enqueue()
228 addr_hi = (uint32_t *)(&jr->input_ring[head]); in jr_enqueue()
232 sec_out32(addr_hi, (uint32_t)(desc_phys_addr >> 32)); in jr_enqueue()
269 uint32_t *addr_hi, *addr_lo; in jr_dequeue() local
287 addr_hi = (uint32_t *)(&jr->output_ring[jr->tail].desc) + 1; in jr_dequeue()
289 addr_hi = (uint32_t *)(&jr->output_ring[jr->tail].desc); in jr_dequeue()
293 op_desc = ((u64)sec_in32(addr_hi) << 32) | in jr_dequeue()
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| D | fsl_hash.c | 97 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, (uint32_t)(addr >> 32)); in caam_hash_update()
99 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, 0x0); in caam_hash_update()
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| /external/u-boot/drivers/net/ |
| D | zynq_gem.c | 171 u32 addr_hi; member
385 priv->rx_bd[i].addr_hi = in zynq_gem_init()
407 dummy_tx_bd->addr_hi = 0; in zynq_gem_init()
416 dummy_rx_bd->addr_hi = 0; in zynq_gem_init()
498 priv->tx_bd->addr_hi = upper_32_bits((ulong)ptr); in zynq_gem_send()
505 current_bd->addr_hi = 0x0; in zynq_gem_send()
559 | ((dma_addr_t)current_bd->addr_hi << 32)); in zynq_gem_recv()
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| /external/tensorflow/tensorflow/lite/experimental/ruy/ |
| D | pack_avx512.cc | 80 const std::int8_t* addr_hi) {
82 return _mm512_inserti32x8(lower_filled, _mm256_loadu_epi8(addr_hi), 1);
87 const std::int8_t* addr_hi) {
91 lower_filled, _mm256_mask_loadu_epi8(default_value_v, row_mask, addr_hi),
426 inline __m512 LoaduTwo(const float* addr_lo, const float* addr_hi) {
428 return _mm512_insertf32x8(lower_filled, _mm256_loadu_ps(addr_hi), 1);
432 const float* addr_hi) {
436 _mm256_maskz_loadu_ps(row_mask, addr_hi), 1);
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| /external/ethtool/ |
| D | marvell.c | 45 u_int32_t addr_hi; in dump_queue() member
63 d->addr_hi, d->addr_lo); in dump_queue()
325 u32 addr_lo, addr_hi; in dump_queue2() member
347 d->addr_hi, d->addr_lo); in dump_queue2()
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| /external/u-boot/include/ |
| D | fsl_sec.h | 210 uint32_t addr_hi; /* Memory Address of start of buffer - hi */ member
212 uint32_t addr_hi; /* Memory Address of start of buffer - hi */
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| D | ahci.h | 131 u32 addr_hi; member
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| D | sdhci.h | 300 u32 addr_hi; member
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| /external/u-boot/drivers/firmware/ |
| D | ti_sci.h | 860 u32 addr_hi; member
912 u32 addr_hi; member
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| D | ti_sci.c | 2315 u32 addr_lo, u32 addr_hi, u32 count, in ti_sci_cmd_ring_config() argument
2343 req.addr_hi = addr_hi; in ti_sci_cmd_ring_config()
2382 u32 *addr_lo, u32 *addr_hi, in ti_sci_cmd_ring_get_config() argument
2425 if (addr_hi) in ti_sci_cmd_ring_get_config()
2426 *addr_hi = resp->addr_hi; in ti_sci_cmd_ring_get_config()
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| /external/u-boot/include/linux/soc/ti/ |
| D | ti_sci_protocol.h | 336 u32 addr_lo, u32 addr_hi, u32 count, u8 mode,
341 u32 *addr_lo, u32 *addr_hi, u32 *count,
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| /external/u-boot/drivers/ata/ |
| D | ahci.c | 513 ahci_sg->addr_hi = cpu_to_le32(upper_32_bits(pa)); in ahci_fill_sg()
514 if (ahci_sg->addr_hi && !(uc_priv->cap & AHCI_CAP_S64A)) { in ahci_fill_sg()
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| D | dwc_ahsata.c | 341 ahci_sg->addr_hi = 0; in ahci_fill_sg()
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| /external/kernel-headers/original/uapi/drm/ |
| D | radeon_drm.h | 203 unsigned char cmd_type, addr_lo, addr_hi, count; member
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| /external/libdrm/include/drm/ |
| D | radeon_drm.h | 203 unsigned char cmd_type, addr_lo, addr_hi, count; member
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| /external/igt-gpu-tools/include/drm-uapi/ |
| D | radeon_drm.h | 203 unsigned char cmd_type, addr_lo, addr_hi, count; member
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| /external/u-boot/drivers/ddr/marvell/a38x/ |
| D | ddr3_training.c | 281 u32 data, addr_hi, data_high; in ddr3_tip_configure_cs() local
294 addr_hi = mem_size_config[mem_index] & 0x3; in ddr3_tip_configure_cs()
298 (addr_hi << (2 + cs_num * 4)), in ddr3_tip_configure_cs()
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| /external/u-boot/drivers/mmc/ |
| D | sdhci.c | 93 desc->addr_hi = (u64)buf >> 32; in sdhci_adma_desc()
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_state_init.c | 191 h.veclinear.addr_hi = (offset & 0xff00) >> 8; in cmdveclinear()
294 _start = h.veclinear.addr_lo | (h.veclinear.addr_hi << 8); \
|