| /external/u-boot/arch/powerpc/cpu/mpc86xx/ |
| D | cache.S | 76 andc r3,r3,r5
103 andc r3,r3,r5 /* align r3 down to cache line */
177 andc r3, r3, r5
196 andc r3, r3, r5
213 andc r3, r3, r5
229 andc r3, r3, r5
256 andc r3, r3, r5
259 andc r3, r3, r5 /* no enable, no invalidate */
|
| D | release.S | 102 andc r3, r3, r5
121 andc r3, r3, r5
|
| D | start.S | 479 andc r3, r3, r0
493 andc r23,r23,r22
517 andc r28,r28,r4
710 andc r3,r3,r0
857 andc r7,r7,r8
955 andc r0,r0,r3
967 andc r0,r0,r3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | andc.ll | 7 ; CHECK-NEXT: andc 3, 4, 3
20 ; CHECK-NEXT: andc 3, 4, 3
34 ; CHECK-NEXT: andc 3, 4, 3
|
| D | variable_elem_vec_extracts.ll | 16 ; CHECK-DAG: andc [[MASKREG:[0-9]+]], [[TRUNCREG]], 5
34 ; CHECK-BE-DAG: andc [[ANDCREG:[0-9]+]], [[IMMREG]], 5
50 ; CHECK-DAG: andc [[MASKREG:[0-9]+]], [[TRUNCREG]], 5
96 ; CHECK: andc [[MASKREG:[0-9]+]], [[TRUNCREG]], 5
|
| D | atomic-minmax.ll | 249 ; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
276 ; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
301 ; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
326 ; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
352 ; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
378 ; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
402 ; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
426 ; CHECK: andc [[NOLDV:[0-9]+]], [[OLDV]], [[M]]
|
| D | p8-scalar_vector_conversions.ll | 542 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
548 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
570 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
576 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
822 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM3]]
828 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM4]]
852 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM3]]
858 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM4]]
|
| D | PR35812-neg-cmpxchg.ll | 55 ; CHECK-P7: andc 9, 9, 5
|
| D | eqv-andc-orc-nor.ll | 4 ; RUN: grep andc | count 3
|
| /external/u-boot/arch/powerpc/lib/ |
| D | ppccache.S | 69 andc r3,r3,r5
93 andc r3,r3,r5
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | variable_elem_vec_extracts.ll | 16 ; CHECK-DAG: andc [[MASKREG:[0-9]+]], [[TRUNCREG]], 5
34 ; CHECK-BE-DAG: andc [[ANDCREG:[0-9]+]], [[IMMREG]], 5
50 ; CHECK-DAG: andc [[MASKREG:[0-9]+]], [[TRUNCREG]], 5
96 ; CHECK: andc [[MASKREG:[0-9]+]], [[TRUNCREG]], 5
|
| D | andc.ll | 3 ; TODO: These could use 'andc'.
|
| D | eqv-andc-orc-nor.ll | 4 ; RUN: grep andc | count 3
|
| D | p8-scalar_vector_conversions.ll | 686 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
692 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
720 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM7]]
726 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM8]]
1038 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM3]]
1044 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM4]]
1074 ; CHECK-DAG: andc [[ANDC:[0-9]+]], [[IMM3]]
1080 ; CHECK-DAG-LE: andc [[ANDC:[0-9]+]], [[IMM4]]
|
| /external/u-boot/arch/powerpc/cpu/mpc83xx/ |
| D | start.S | 117 andc r3, r3, r0
425 andc r23,r23,r22
448 andc r28,r28,r4
736 andc r3, r3, r4
749 andc r3, r3, r4
765 andc r3, r3, r5
777 andc r3, r3, r5
898 andc r3,r3,r0
1048 andc r3, r3, r7 /* (if it was on) */
1099 andc r3, r3, r5 /* no invalidate, unlock */
|
| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding.s.cs | 147 0x7c,0x62,0x20,0x78 = andc 2, 3, 4
148 0x7c,0x62,0x20,0x79 = andc. 2, 3, 4
|
| /external/u-boot/arch/powerpc/cpu/mpc8xx/ |
| D | start.S | 272 andc r23,r23,r22
296 andc r28,r28,r4
397 andc r3,r3,r0
|
| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| D | start.S | 157 andc r4, r3, r2
404 andc r3, r3, r2 /* Clear the TSIZE bits */
419 andc r2, r2, r3
432 andc r2, r2, r3
1321 andc r28,r28,r4
1389 andc r0,r0,r3
1420 andc r3,r3,r4
1625 andc r3,r3,r0
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 632 # CHECK-BE: andc 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x78]
633 # CHECK-LE: andc 2, 3, 4 # encoding: [0x78,0x20,0x62,0x7c]
634 andc 2, 3, 4
635 # CHECK-BE: andc. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x79]
636 # CHECK-LE: andc. 2, 3, 4 # encoding: [0x79,0x20,0x62,0x7c]
637 andc. 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 718 # CHECK-BE: andc 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x78]
719 # CHECK-LE: andc 2, 3, 4 # encoding: [0x78,0x20,0x62,0x7c]
720 andc 2, 3, 4
721 # CHECK-BE: andc. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x79]
722 # CHECK-LE: andc. 2, 3, 4 # encoding: [0x79,0x20,0x62,0x7c]
723 andc. 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64le-encoding.txt | 499 # CHECK: andc 2, 3, 4
502 # CHECK: andc. 2, 3, 4
|
| D | ppc64-encoding.txt | 541 # CHECK: andc 2, 3, 4
544 # CHECK: andc. 2, 3, 4
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding.txt | 508 # CHECK: andc 2, 3, 4
511 # CHECK: andc. 2, 3, 4
|
| D | ppc64le-encoding.txt | 487 # CHECK: andc 2, 3, 4
490 # CHECK: andc. 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | README_ALTIVEC.txt | 174 codegen'd to andc. The issue is that the 'all ones' build vector is
|