| /external/capstone/arch/AArch64/ |
| D | AArch64InstPrinter.c | 56 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM; in set_mem_access()
57 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = ARM64_REG_… in set_mem_access()
58 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG… in set_mem_access()
59 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = 0; in set_mem_access()
62 MI->flat_insn->detail->arm64.op_count++; in set_mem_access()
119 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
120 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
121 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
122 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
123 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = getWRegFromXReg… in AArch64_printInst()
[all …]
|
| /external/libhevc/ |
| D | Android.bp | 87 arm64: {
99 "decoder/arm64",
100 "common/arm64",
106 "decoder/arm64/ihevcd_function_selector_av8.c",
109 "common/arm64/ihevc_mem_fns.s",
110 "common/arm64/ihevc_itrans_recon_32x32.s",
111 "common/arm64/ihevc_weighted_pred_bi_default.s",
112 "common/arm64/ihevc_weighted_pred_bi.s",
113 "common/arm64/ihevc_weighted_pred_uni.s",
114 "common/arm64/ihevc_deblk_luma_horz.s",
[all …]
|
| /external/igt-gpu-tools/ |
| D | Dockerfile.debian-arm64 | 13 RUN dpkg --add-architecture arm64
17 libatomic1:arm64 \
18 libpciaccess-dev:arm64 \
19 libkmod-dev:arm64 \
20 libprocps-dev:arm64 \
21 libunwind-dev:arm64 \
22 libdw-dev:arm64 \
23 zlib1g-dev:arm64 \
24 liblzma-dev:arm64 \
25 libcairo-dev:arm64 \
[all …]
|
| /external/cpuinfo/scripts/ |
| D | android-arm64-mock.sh | 5 adb push build/android/arm64-v8a/alcatel-revvl-test /data/local/tmp/alcatel-revvl-test
6 adb push build/android/arm64-v8a/galaxy-a8-2018-test /data/local/tmp/galaxy-a8-2018-test
7 adb push build/android/arm64-v8a/galaxy-c9-pro-test /data/local/tmp/galaxy-c9-pro-test
8 adb push build/android/arm64-v8a/galaxy-s6-test /data/local/tmp/galaxy-s6-test
9 adb push build/android/arm64-v8a/galaxy-s7-global-test /data/local/tmp/galaxy-s7-global-test
10 adb push build/android/arm64-v8a/galaxy-s7-us-test /data/local/tmp/galaxy-s7-us-test
11 adb push build/android/arm64-v8a/galaxy-s8-global-test /data/local/tmp/galaxy-s8-global-test
12 adb push build/android/arm64-v8a/galaxy-s8-us-test /data/local/tmp/galaxy-s8-us-test
13 adb push build/android/arm64-v8a/galaxy-s9-global-test /data/local/tmp/galaxy-s9-global-test
14 adb push build/android/arm64-v8a/galaxy-s9-us-test /data/local/tmp/galaxy-s9-us-test
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | cpus.ll | 4 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
5 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a35 2>&1 | FileCheck %s
6 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
7 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a55 2>&1 | FileCheck %s
8 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a57 2>&1 | FileCheck %s
9 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
10 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a73 2>&1 | FileCheck %s
11 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a75 2>&1 | FileCheck %s
12 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m1 2>&1 | FileCheck %s
13 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m2 2>&1 | FileCheck %s
[all …]
|
| D | machine-outliner-flags.ll | 4 ; RUN: -mtriple arm64---- -o /dev/null 2>&1 \
9 ; RUN: -mtriple arm64---- -o /dev/null 2>&1 \
13 ; RUN: -enable-machine-outliner=never -mtriple arm64---- -o /dev/null 2>&1 \
17 ; RUN: --debug-only=machine-outliner -mtriple arm64---- -o /dev/null 2>&1 \
21 ; RUN: -mtriple arm64---- -o /dev/null 2>&1 \
|
| D | simple-macho.ll | 1 ; RUN: llc -mtriple=arm64-macho -o - %s | FileCheck %s
2 ; RUN: llc -mtriple=arm64-macho -filetype=obj -o %t %s
3 ; RUN: llvm-objdump -triple=arm64-macho -d %t | FileCheck --check-prefix=CHECK-OBJ %s
|
| /external/google-breakpad/src/common/mac/ |
| D | arch_utilities.cc | 59 NXArchInfo* arm64 = new NXArchInfo; in ArchInfo_arm64() local
60 *arm64 = *NXGetArchInfoFromCpuType(CPU_TYPE_ARM, in ArchInfo_arm64()
62 arm64->name = "arm64"; in ArchInfo_arm64()
63 arm64->cputype = CPU_TYPE_ARM64; in ArchInfo_arm64()
64 arm64->cpusubtype = CPU_SUBTYPE_ARM64_ALL; in ArchInfo_arm64()
65 arm64->description = "arm 64"; in ArchInfo_arm64()
66 return arm64; in ArchInfo_arm64()
100 static const NXArchInfo* arm64 = ArchInfo_arm64(); in BreakpadGetArchInfoFromCpuType() local
101 return arm64; in BreakpadGetArchInfoFromCpuType()
|
| /external/capstone/cstool/ |
| D | cstool_arm64.c | 13 cs_arm64 *arm64; in print_insn_detail_arm64() local
20 arm64 = &(ins->detail->arm64); in print_insn_detail_arm64()
21 if (arm64->op_count) in print_insn_detail_arm64()
22 printf("\top_count: %u\n", arm64->op_count); in print_insn_detail_arm64()
24 for (i = 0; i < arm64->op_count; i++) { in print_insn_detail_arm64()
25 cs_arm64_op *op = &(arm64->operands[i]); in print_insn_detail_arm64()
94 if (arm64->update_flags) in print_insn_detail_arm64()
97 if (arm64->writeback) in print_insn_detail_arm64()
100 if (arm64->cc) in print_insn_detail_arm64()
101 printf("\tCode-condition: %u\n", arm64->cc); in print_insn_detail_arm64()
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | cpus.ll | 4 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
5 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a35 2>&1 | FileCheck %s
6 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
7 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a57 2>&1 | FileCheck %s
8 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
9 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a73 2>&1 | FileCheck %s
10 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m1 2>&1 | FileCheck %s
11 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=kryo 2>&1 | FileCheck %s
12 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=vulcan 2>&1 | FileCheck %s
13 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=…
|
| D | simple-macho.ll | 1 ; RUN: llc -mtriple=arm64-macho -o - %s | FileCheck %s
2 ; RUN: llc -mtriple=arm64-macho -filetype=obj -o %t %s
3 ; RUN: llvm-objdump -triple=arm64-macho -d %t | FileCheck --check-prefix=CHECK-OBJ %s
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-basic-a64-undefined.txt | 4 # RUN: echo "0x00 0x08 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
5 # RUN: echo "0x00 0x88 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
9 # RUN: echo "0x00 0x10 0xa0 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
10 # RUN: echo "0x00 0x10 0x60 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
11 # RUN: echo "0x00 0x14 0x20 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
14 # RUN: echo "0x00 0x00 0xc0 0x72" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
17 # RUN: echo "0x00 0x00 0xc0 0xeb" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
18 # RUN: echo "0x00 0x80 0x80 0x6b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
21 # RUN: echo "0x00 0x80 0x00 0x53" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
24 # RUN: echo "0x00 0x40 0x00 0x2e" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-basic-a64-undefined.txt | 4 # RUN: echo "0x00 0x08 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
5 # RUN: echo "0x00 0x88 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
9 # RUN: echo "0x00 0x10 0xa0 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
10 # RUN: echo "0x00 0x10 0x60 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
11 # RUN: echo "0x00 0x14 0x20 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
14 # RUN: echo "0x00 0x00 0xc0 0x72" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
17 # RUN: echo "0x00 0x00 0xc0 0xeb" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
18 # RUN: echo "0x00 0x80 0x80 0x6b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
21 # RUN: echo "0x00 0x80 0x00 0x53" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
24 # RUN: echo "0x00 0x40 0x00 0x2e" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
[all …]
|
| /external/capstone/tests/ |
| D | test_arm64.c | 34 cs_arm64 *arm64; in print_insn_detail() local
41 arm64 = &(ins->detail->arm64); in print_insn_detail()
42 if (arm64->op_count) in print_insn_detail()
43 printf("\top_count: %u\n", arm64->op_count); in print_insn_detail()
45 for (i = 0; i < arm64->op_count; i++) { in print_insn_detail()
46 cs_arm64_op *op = &(arm64->operands[i]); in print_insn_detail()
115 if (arm64->update_flags) in print_insn_detail()
118 if (arm64->writeback) in print_insn_detail()
121 if (arm64->cc) in print_insn_detail()
122 printf("\tCode-condition: %u\n", arm64->cc); in print_insn_detail()
|
| /external/linux-kselftest/tools/testing/selftests/arm64/ |
| D | README | 4 - These tests are arm64 specific and so not built or run but just skipped
5 completely when env-variable ARCH is found to be different than 'arm64'
11 $ make TARGETS=arm64 kselftest-clean
12 $ make TARGETS=arm64 kselftest
16 $ make -C tools/testing/selftests TARGETS=arm64 \
19 or, alternatively, only specific arm64/ subtargets can be picked:
21 $ make -C tools/testing/selftests TARGETS=arm64 ARM64_SUBTARGETS="tags signal" \
|
| /external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| D | mismatched-intrinsics.ll | 3 target triple = "arm64-apple-ios5.0.0"
7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32
8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32
10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| D | mismatched-intrinsics.ll | 3 target triple = "arm64-apple-ios5.0.0"
7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32
8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32
10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /external/bcc/debian/ |
| D | control | 7 libllvm3.7 [!arm64] | libllvm3.8 [!arm64] | libllvm6.0,
8 llvm-3.7-dev [!arm64] | llvm-3.8-dev [!arm64] | llvm-6.0-dev,
9 libclang-3.7-dev [!arm64] | libclang-3.8-dev [!arm64] | libclang-6.0-dev,
10 clang-format | clang-format-3.7 [!arm64] | clang-format-3.8 [!arm64] | clang-format-6.0,
|
| /external/tensorflow/tensorflow/lite/tools/pip_package/ |
| D | Dockerfile | 8 RUN dpkg --add-architecture arm64
19 libpython-dev:arm64 \
26 libpython3-dev:arm64 \
28 crossbuild-essential-arm64 \
31 zlib1g-dev:arm64 \
|
| /external/libvpx/ |
| D | Android.bp.in | 25 arm64: {
27 local_include_dirs: ["config/arm64"],
81 arm64: {
82 local_include_dirs: ["config/arm64"],
117 arm64: {
118 local_include_dirs: ["config/arm64"],
|
| /external/skia/build/fuchsia/skqp/ |
| D | README.md | 2 Using an arm64 device as an example, to build skqp for Fuchsia:
4 gn gen out/fuchsia-arm64 --args="is_official_build=false is_debug=false skia_update_fuchsia_sdk=tru…
11 autoninja -C out/fuchsia-arm64 ":skqp_repo"
19 These steps assume the creation of the arm64 CIPD package as an example. Because the package requi…
29 cipd set-ref skia/fuchsia/skqp/arch/arm64 -ref latest -version mdhS7sryb2zxQuXT803Dv_XZ0r7B5j8jSbZm…
34 cipd set-tag skia/fuchsia/skqp/arch/arm64 -tag=git-commit:9c2b7cfe9080c6c4692234667a671db216a2e229 …
|
| /external/v8/ |
| D | Android.base.bp | 577 arm64: {
579 "src/codegen/arm64/assembler-arm64.cc",
580 "src/codegen/arm64/cpu-arm64.cc",
581 "src/codegen/arm64/decoder-arm64.cc",
582 "src/codegen/arm64/instructions-arm64-constants.cc",
583 "src/codegen/arm64/instructions-arm64.cc",
584 "src/codegen/arm64/interface-descriptors-arm64.cc",
585 "src/codegen/arm64/macro-assembler-arm64.cc",
586 "src/codegen/arm64/register-arm64.cc",
587 "src/codegen/arm64/utils-arm64.cc",
[all …]
|
| /external/capstone/bindings/ocaml/ |
| D | test_arm64.ml | 58 | CS_INFO_ARM64 arm64 -> (
59 if arm64.cc != _ARM64_CC_AL && arm64.cc != _ARM64_CC_INVALID then
60 printf "\tCode condition: %u\n" arm64.cc;
62 if arm64.update_flags then
65 if arm64.writeback then
69 if (Array.length arm64.operands) > 0 then (
70 printf "\top_count: %d\n" (Array.length arm64.operands);
71 Array.iteri (print_op handle) arm64.operands;
|
| /external/u-boot/doc/uImage.FIT/ |
| D | multi_spl.its | 26 arch = "arm64";
34 arch = "arm64";
53 arch = "arm64";
61 arch = "arm64";
69 arch = "arm64";
77 arch = "arm64";
|
| /external/v8/infra/mb/ |
| D | mb_config.pyl | 18 'arm64.debug': 'default_debug_arm64',
19 'arm64.optdebug': 'default_optdebug_arm64',
20 'arm64.release': 'default_release_arm64',
78 'V8 Mac - arm64 - release builder': 'release_arm64',
79 'V8 Mac - arm64 - sim - debug builder': 'debug_simulate_arm64',
80 'V8 Mac - arm64 - sim - release builder': 'release_simulate_arm64',
85 'V8 Linux - arm64 - sim - CFI': 'release_simulate_arm64_cfi',
86 'V8 Linux - arm64 - sim - MSAN': 'release_simulate_arm64_msan',
95 'V8 Linux64 - arm64 - sim - pointer compression - builder':
128 'V8 Clusterfuzz Linux64 ASAN arm64 - debug builder':
[all …]
|