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Searched refs:bank_num (Results 1 – 18 of 18) sorted by relevance

/external/u-boot/drivers/pinctrl/rockchip/
Dpinctrl-rk322x.c17 .bank_num = 0,
24 .bank_num = 3,
31 .bank_num = 0,
38 .bank_num = 0,
45 .bank_num = 0,
52 .bank_num = 1,
59 .bank_num = 3,
66 .bank_num = 1,
73 .bank_num = 1,
80 .bank_num = 3,
[all …]
Dpinctrl-rk3308.c111 .bank_num = 0,
118 .bank_num = 1,
125 .bank_num = 4,
132 .bank_num = 0,
139 .bank_num = 3,
146 .bank_num = 2,
153 .bank_num = 1,
160 .bank_num = 1,
167 .bank_num = 1,
174 .bank_num = 1,
[all …]
Dpinctrl-rk3328.c39 .bank_num = 1,
46 .bank_num = 2,
53 .bank_num = 1,
60 .bank_num = 1,
67 .bank_num = 2,
74 .bank_num = 1,
81 .bank_num = 3,
88 .bank_num = 1,
95 .bank_num = 3,
102 .bank_num = 2,
[all …]
Dpinctrl-px30.c17 .bank_num = 2,
24 .bank_num = 3,
31 .bank_num = 3,
38 .bank_num = 2,
45 .bank_num = 1,
52 .bank_num = 2,
59 .bank_num = 0,
66 .bank_num = 1,
120 if (bank->bank_num == 0) { in px30_calc_pull_reg_and_bit()
129 *reg += bank->bank_num * PX30_PULL_BANK_STRIDE; in px30_calc_pull_reg_and_bit()
[all …]
Dpinctrl-rk3399.c17 .bank_num = 4,
24 .bank_num = 4,
31 .bank_num = 4,
38 .bank_num = 2,
45 .bank_num = 4,
96 if (bank->bank_num == 0 || bank->bank_num == 1) { in rk3399_calc_pull_reg_and_bit()
100 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
107 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
151 if (bank->bank_num == 0 || bank->bank_num == 1) in rk3399_calc_drv_reg_and_bit()
Dpinctrl-rk3288.c16 .bank_num = 7,
23 .bank_num = 7,
58 if (bank->bank_num == 0) { in rk3288_set_mux()
82 if (bank->bank_num == 0) { in rk3288_calc_pull_reg_and_bit()
91 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3288_calc_pull_reg_and_bit()
120 if (bank->bank_num == 0) { in rk3288_set_pull()
144 if (bank->bank_num == 0) { in rk3288_calc_drv_reg_and_bit()
153 *reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE; in rk3288_calc_drv_reg_and_bit()
178 if (bank->bank_num == 0) { in rk3288_set_drive()
Dpinctrl-rk3128.c51 .bank_num = 1,
58 .bank_num = 1,
65 .bank_num = 0,
72 .bank_num = 1,
79 .bank_num = 0,
86 .bank_num = 1,
93 .bank_num = 2,
149 *reg += bank->bank_num * RK3128_PULL_BANK_STRIDE; in rk3128_calc_pull_reg_and_bit()
Dpinctrl-rockchip.h94 u8 bank_num; member
104 .bank_num = id, \
117 .bank_num = id, \
130 .bank_num = id, \
151 .bank_num = id, \
177 .bank_num = id, \
201 .bank_num = id, \
247 u8 bank_num; member
Dpinctrl-rv1108.c115 if (bank->bank_num == 0) { in rv1108_calc_pull_reg_and_bit()
123 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rv1108_calc_pull_reg_and_bit()
169 if (bank->bank_num == 0) { in rv1108_calc_drv_reg_and_bit()
178 *reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE; in rv1108_calc_drv_reg_and_bit()
224 if (bank->bank_num == 0) { in rv1108_calc_schmitt_reg_and_bit()
232 *reg += (bank->bank_num - 1) * RV1108_SCHMITT_BANK_STRIDE; in rv1108_calc_schmitt_reg_and_bit()
Dpinctrl-rockchip-core.c48 if (data->num == bank->bank_num && in rockchip_get_recalced_mux()
71 if (data->bank_num == bank->bank_num && in rockchip_get_mux_route()
207 debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rockchip_set_mux()
249 debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num, in rockchip_set_drive_perpin()
295 debug("setting pull of GPIO%d-%d to %d\n", bank->bank_num, in rockchip_set_pull()
310 debug("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num, in rockchip_set_schmitt()
571 if (ctrl->iomux_recalced[j].num == bank->bank_num) {
581 if (ctrl->iomux_routes[j].bank_num == bank->bank_num) {
Dpinctrl-rk3368.c48 if (bank->bank_num == 0) { in rk3368_calc_pull_reg_and_bit()
57 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3368_calc_pull_reg_and_bit()
103 if (bank->bank_num == 0) { in rk3368_calc_drv_reg_and_bit()
112 *reg += bank->bank_num * ROCKCHIP_DRV_BANK_STRIDE; in rk3368_calc_drv_reg_and_bit()
Dpinctrl-rk3188.c48 if (bank->bank_num == 0 && pin_num < 12) { in rk3188_calc_pull_reg_and_bit()
61 *reg += bank->bank_num * ROCKCHIP_PULL_BANK_STRIDE; in rk3188_calc_pull_reg_and_bit()
Dpinctrl-rk3036.c50 *reg += bank->bank_num * RK3036_PULL_BANK_STRIDE; in rk3036_calc_pull_reg_and_bit()
/external/u-boot/drivers/gpio/
Dzynq_gpio.c191 unsigned int *bank_num, in zynq_gpio_get_bank_pin() argument
201 *bank_num = bank; in zynq_gpio_get_bank_pin()
210 *bank_num = 0; in zynq_gpio_get_bank_pin()
234 unsigned int bank_num, bank_pin_num; in zynq_gpio_get_value() local
240 zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num, dev); in zynq_gpio_get_value()
243 ZYNQ_GPIO_DATA_RO_OFFSET(bank_num)); in zynq_gpio_get_value()
250 unsigned int reg_offset, bank_num, bank_pin_num; in zynq_gpio_set_value() local
256 zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num, dev); in zynq_gpio_set_value()
261 reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num); in zynq_gpio_set_value()
263 reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num); in zynq_gpio_set_value()
[all …]
Dxilinx_gpio.c35 static int xilinx_gpio_get_bank_pin(unsigned offset, u32 *bank_num, in xilinx_gpio_get_bank_pin() argument
48 *bank_num = bank; in xilinx_gpio_get_bank_pin()
/external/arm-trusted-firmware/plat/marvell/a3700/a3700/board/
Dpm_src.c17 .gpio_data.bank_num = 0, /* North Bridge */
24 .gpio_data.bank_num = 1, /* South Bridge */
/external/arm-trusted-firmware/plat/marvell/a3700/common/include/
Da3700_pm.h28 uint32_t bank_num; member
/external/arm-trusted-firmware/plat/marvell/a3700/common/
Dplat_pm.c537 if (src_data->gpio_data.bank_num == 0) in a3700_pm_src_gpio()