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Searched refs:bitsGT (Results 1 – 25 of 36) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DValueTypes.h200 bool bitsGT(EVT VT) const { in bitsGT() function
DMachineValueType.h532 bool bitsGT(MVT VT) const { in bitsGT() function
/external/llvm/lib/Target/ARM/
DARMSelectionDAGInfo.cpp91 if (Src.getValueType().bitsGT(MVT::i32)) in EmitSpecializedLibcall()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMSelectionDAGInfo.cpp91 if (Src.getValueType().bitsGT(MVT::i32)) in EmitSpecializedLibcall()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DValueTypes.h229 bool bitsGT(EVT VT) const { in bitsGT() function
/external/llvm/lib/Target/X86/
DX86SelectionDAGInfo.cpp137 if (AVT.bitsGT(MVT::i8)) { in EmitTargetCodeForMemset()
DX86FastISel.cpp3441 if (DstVT.bitsGT(SrcVT)) in fastSelectInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86SelectionDAGInfo.cpp157 if (AVT.bitsGT(MVT::i8)) { in EmitTargetCodeForMemset()
DX86FastISel.cpp3661 if (DstVT.bitsGT(SrcVT)) in fastSelectInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DMachineValueType.h772 bool bitsGT(MVT VT) const { in bitsGT() function
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp1077 return VT.bitsGT(Op.getValueType()) in getFPExtendOrRound()
1083 return VT.bitsGT(Op.getValueType()) ? in getAnyExtOrTrunc()
1089 return VT.bitsGT(Op.getValueType()) ? in getSExtOrTrunc()
1095 return VT.bitsGT(Op.getValueType()) ? in getZExtOrTrunc()
3739 if (SVT.bitsGT(VT.getScalarType())) in FoldCONCAT_VECTORS()
4031 assert(Operand.getValueType().bitsGT(VT) && in getNode()
4041 if (Operand.getOperand(0).getValueType().bitsGT(VT)) in getNode()
4283 if (V1->getValueType(0).bitsGT(SVT)) in FoldConstantArithmetic()
4285 if (V2->getValueType(0).bitsGT(SVT)) in FoldConstantArithmetic()
4386 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) in FoldConstantVectorArithmetic()
[all …]
DFastISel.cpp521 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()
1860 if (DstVT.bitsGT(SrcVT)) in selectOperator()
DDAGCombiner.cpp4063 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
9397 if (N0.getOperand(0).getValueType().bitsGT(VT)) in visitTRUNCATE()
15060 ISD::LoadExtType ExtTy = ResultVT.bitsGT(VecEltVT) ? in ReplaceExtractVectorEltOfLoadWithNarrowedLoad()
15094 if (ResultVT.bitsGT(VecEltVT)) { in ReplaceExtractVectorEltOfLoadWithNarrowedLoad()
15275 if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType())) in visitEXTRACT_VECTOR_ELT()
17793 if (XType.bitsGT(AType)) { in foldSelectCCToShiftAnd()
17808 if (XType.bitsGT(AType)) { in foldSelectCCToShiftAnd()
DLegalizeVectorTypes.cpp1141 if (EltVT.bitsGT(Elt.getValueType())) in SplitVecRes_INSERT_VECTOR_ELT()
DTargetLowering.cpp2313 if (Op0.getValueType().bitsGT(VT)) in SimplifySetCC()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp1002 return VT.bitsGT(Op.getValueType()) ? in getAnyExtOrTrunc()
1008 return VT.bitsGT(Op.getValueType()) ? in getSExtOrTrunc()
1014 return VT.bitsGT(Op.getValueType()) ? in getZExtOrTrunc()
2874 if (SVT.bitsGT(VT.getScalarType())) in FoldCONCAT_VECTORS()
3134 assert(Operand.getValueType().bitsGT(VT) && in getNode()
3144 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) in getNode()
3437 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) in FoldConstantVectorArithmetic()
4224 if (VT.bitsGT(LVT)) in FindOptimalMemOpLowering()
4555 if (MemOps[i].bitsGT(LargestVT)) in getMemsetStores()
DFastISel.cpp332 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()
1655 if (DstVT.bitsGT(SrcVT)) in selectOperator()
DDAGCombiner.cpp3034 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
5114 if (VT.bitsGT(VT0)) in visitSELECT()
6302 if (VT.bitsGT(Op.getValueType())) in visitZERO_EXTEND()
6359 } else if (SrcVT.bitsGT(VT)) { in visitZERO_EXTEND()
6378 } else if (X.getValueType().bitsGT(VT)) { in visitZERO_EXTEND()
6605 if (TruncOp.getValueType().bitsGT(VT)) in visitANY_EXTEND()
6620 } else if (X.getValueType().bitsGT(VT)) { in visitANY_EXTEND()
7097 if (N0.getOperand(0).getValueType().bitsGT(VT)) in visitTRUNCATE()
12245 InVal = OpVT.bitsGT(InVal.getValueType()) ? in visitINSERT_VECTOR_ELT()
12297 if (ResultVT.bitsGT(VecEltVT)) { in ReplaceExtractVectorEltOfLoadWithNarrowedLoad()
[all …]
DTargetLowering.cpp1716 if (Op0.getValueType().bitsGT(VT)) in SimplifySetCC()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1682 return VT.bitsGT(MVT::i32) && Align % 4 == 0; in allowsMisalignedMemoryAccesses()
1928 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1834 return VT.bitsGT(MVT::i32) && Align % 4 == 0; in allowsMisalignedMemoryAccesses()
2037 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
DSIISelLowering.cpp474 return VT.bitsGT(MVT::i32) && Align % 4 == 0; in allowsMisalignedMemoryAccesses()
/external/llvm/lib/CodeGen/
DCodeGenPrepare.cpp4506 if (!LoadResultVT.bitsGT(TruncVT) || !TruncVT.isRound() || in optimizeLoadExt()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4918 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp4832 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()

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