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Searched refs:cpu_id (Results 1 – 25 of 163) sorted by relevance

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/external/arm-trusted-firmware/plat/marvell/a8k/common/
Dplat_pm.c88 #define PWRC_CPUN_CR_REG(cpu_id) \ argument
89 (MVEBU_REGS_BASE + 0x680000 + (cpu_id * 0x10))
98 #define CCU_B_PRCRN_REG(cpu_id) \ argument
100 ((cpu_id / 2) * (0x400)) + ((cpu_id % 2) * 4))
117 static int plat_marvell_cpu_powerdown(int cpu_id) in plat_marvell_cpu_powerdown() argument
122 INFO("Powering down CPU%d\n", cpu_id); in plat_marvell_cpu_powerdown()
125 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerdown()
127 mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val); in plat_marvell_cpu_powerdown()
131 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerdown()
137 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerdown()
[all …]
/external/arm-trusted-firmware/plat/imx/imx8qx/
Dimx8qx_psci.c68 unsigned int cpu_id; in imx_pwr_domain_on() local
70 cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_on()
72 printf("imx_pwr_domain_on cpu_id %d\n", cpu_id); in imx_pwr_domain_on()
74 if (sc_pm_set_resource_power_mode(ipc_handle, ap_core_index[cpu_id], in imx_pwr_domain_on()
76 ERROR("core %d power on failed!\n", cpu_id); in imx_pwr_domain_on()
80 if (sc_pm_cpu_start(ipc_handle, ap_core_index[cpu_id], in imx_pwr_domain_on()
82 ERROR("boot core %d failed!\n", cpu_id); in imx_pwr_domain_on()
103 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_off() local
106 sc_pm_req_cpu_low_power_mode(ipc_handle, ap_core_index[cpu_id], in imx_pwr_domain_off()
108 printf("turn off core:%d\n", cpu_id); in imx_pwr_domain_off()
[all …]
/external/autotest/client/site_tests/kernel_CheckArmErrata/
Dkernel_CheckArmErrata.py108 def _get_regid_to_val(cpu_id): argument
122 cpu_id).stdout.strip()
129 if not line.startswith("CPU %d: " % cpu_id):
132 (cpu_id, line.split(":")[0]))
204 cpu_id = cpuinfo["processor"]
216 regid_to_val = self._get_regid_to_val(cpu_id)
232 logging.info("CPU %d: erratum 818325 / 852422 good", cpu_id)
242 logging.info("CPU %d: erratum 821420 good", cpu_id)
251 logging.info("CPU %d: erratum 825619 good", cpu_id)
317 cpu_id = cpuinfo["processor"]
[all …]
/external/linux-kselftest/tools/testing/selftests/rseq/
Drseq-arm.h121 #define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \ argument
124 "cmp %[" __rseq_str(cpu_id) "], r0\n\t" \
167 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpeqv_storev()
174 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpeqv_storev()
187 : [cpu_id] "r" (cpu), in rseq_cmpeqv_storev()
188 [current_cpu_id] "m" (__rseq_abi.cpu_id), in rseq_cmpeqv_storev()
234 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpnev_storeoffp_load()
241 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpnev_storeoffp_load()
257 : [cpu_id] "r" (cpu), in rseq_cmpnev_storeoffp_load()
258 [current_cpu_id] "m" (__rseq_abi.cpu_id), in rseq_cmpnev_storeoffp_load()
[all …]
Drseq-x86.h91 #define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \ argument
93 "cmpl %[" __rseq_str(cpu_id) "], " __rseq_str(current_cpu_id) "\n\t" \
127 RSEQ_ASM_CMP_CPU_ID(cpu_id, RSEQ_CPU_ID_OFFSET(%[rseq_abi]), 4f) in rseq_cmpeqv_storev()
133 RSEQ_ASM_CMP_CPU_ID(cpu_id, RSEQ_CPU_ID_OFFSET(%[rseq_abi]), %l[error1]) in rseq_cmpeqv_storev()
143 : [cpu_id] "r" (cpu), in rseq_cmpeqv_storev()
188 RSEQ_ASM_CMP_CPU_ID(cpu_id, RSEQ_CPU_ID_OFFSET(%[rseq_abi]), 4f) in rseq_cmpnev_storeoffp_load()
195 RSEQ_ASM_CMP_CPU_ID(cpu_id, RSEQ_CPU_ID_OFFSET(%[rseq_abi]), %l[error1]) in rseq_cmpnev_storeoffp_load()
209 : [cpu_id] "r" (cpu), in rseq_cmpnev_storeoffp_load()
249 RSEQ_ASM_CMP_CPU_ID(cpu_id, RSEQ_CPU_ID_OFFSET(%[rseq_abi]), 4f) in rseq_addv()
252 RSEQ_ASM_CMP_CPU_ID(cpu_id, RSEQ_CPU_ID_OFFSET(%[rseq_abi]), %l[error1]) in rseq_addv()
[all …]
Drseq-mips.h127 #define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \ argument
130 "bne $4, %[" __rseq_str(cpu_id) "], " __rseq_str(label) "\n\t"
174 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpeqv_storev()
180 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpeqv_storev()
192 : [cpu_id] "r" (cpu), in rseq_cmpeqv_storev()
193 [current_cpu_id] "m" (__rseq_abi.cpu_id), in rseq_cmpeqv_storev()
239 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpnev_storeoffp_load()
245 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpnev_storeoffp_load()
260 : [cpu_id] "r" (cpu), in rseq_cmpnev_storeoffp_load()
261 [current_cpu_id] "m" (__rseq_abi.cpu_id), in rseq_cmpnev_storeoffp_load()
[all …]
Drseq-ppc.h137 #define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \ argument
140 "cmpw cr7, %[" __rseq_str(cpu_id) "], %%r17\n\t" \
221 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpeqv_storev()
228 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpeqv_storev()
237 : [cpu_id] "r" (cpu), in rseq_cmpeqv_storev()
238 [current_cpu_id] "m" (__rseq_abi.cpu_id), in rseq_cmpeqv_storev()
281 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpnev_storeoffp_load()
288 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpnev_storeoffp_load()
303 : [cpu_id] "r" (cpu), in rseq_cmpnev_storeoffp_load()
304 [current_cpu_id] "m" (__rseq_abi.cpu_id), in rseq_cmpnev_storeoffp_load()
[all …]
Drseq-arm64.h174 #define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \ argument
176 RSEQ_ASM_OP_CMPEQ32(current_cpu_id, cpu_id, label)
220 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpeqv_storev()
225 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpeqv_storev()
232 : [cpu_id] "r" (cpu), in rseq_cmpeqv_storev()
233 [current_cpu_id] "Qo" (__rseq_abi.cpu_id), in rseq_cmpeqv_storev()
274 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpnev_storeoffp_load()
279 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpnev_storeoffp_load()
289 : [cpu_id] "r" (cpu), in rseq_cmpnev_storeoffp_load()
290 [current_cpu_id] "Qo" (__rseq_abi.cpu_id), in rseq_cmpnev_storeoffp_load()
[all …]
Drseq-s390.h117 #define RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, label) \ argument
119 "c %[" __rseq_str(cpu_id) "], %[" __rseq_str(current_cpu_id) "]\n\t" \
151 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpeqv_storev()
157 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpeqv_storev()
167 : [cpu_id] "r" (cpu), in rseq_cmpeqv_storev()
168 [current_cpu_id] "m" (__rseq_abi.cpu_id), in rseq_cmpeqv_storev()
214 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in rseq_cmpnev_storeoffp_load()
221 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, %l[error1]) in rseq_cmpnev_storeoffp_load()
235 : [cpu_id] "r" (cpu), in rseq_cmpnev_storeoffp_load()
236 [current_cpu_id] "m" (__rseq_abi.cpu_id), in rseq_cmpnev_storeoffp_load()
[all …]
/external/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/
Dpmu.c36 static inline uint32_t get_cpus_pwr_domain_cfg_info(uint32_t cpu_id) in get_cpus_pwr_domain_cfg_info() argument
40 pd_reg = mmio_read_32(PMU_BASE + PMU_PWRDN_CON) & BIT(cpu_id); in get_cpus_pwr_domain_cfg_info()
41 apm_reg = mmio_read_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id)) & in get_cpus_pwr_domain_cfg_info()
54 static int cpus_power_domain_on(uint32_t cpu_id) in cpus_power_domain_on() argument
58 cpu_pd = PD_CPU0 + cpu_id; in cpus_power_domain_on()
59 cfg_info = get_cpus_pwr_domain_cfg_info(cpu_id); in cpus_power_domain_on()
63 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
68 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
75 WARN("%s: cpu%d is not in off,!\n", __func__, cpu_id); in cpus_power_domain_on()
79 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
[all …]
/external/arm-trusted-firmware/plat/imx/imx8qm/
Dimx8qm_psci.c78 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_on() local
87 ap_core_index[cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id], in imx_pwr_domain_on()
89 ERROR("core %d power on failed!\n", cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id); in imx_pwr_domain_on()
94 ap_core_index[cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id], in imx_pwr_domain_on()
96 ERROR("boot core %d failed!\n", cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id); in imx_pwr_domain_on()
118 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_off() local
122 ap_core_index[cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id], in imx_pwr_domain_off()
130 printf("turn off cluster:%d core:%d\n", cluster_id, cpu_id); in imx_pwr_domain_off()
137 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend() local
142 ap_core_index[cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id], in imx_domain_suspend()
[all …]
/external/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/flowctrl/
Dflowctrl.c47 static inline void tegra_fc_cc4_ctrl(int cpu_id, uint32_t val) in tegra_fc_cc4_ctrl() argument
49 mmio_write_32(flowctrl_offset_cc4_ctrl[cpu_id], val); in tegra_fc_cc4_ctrl()
50 val = mmio_read_32(flowctrl_offset_cc4_ctrl[cpu_id]); in tegra_fc_cc4_ctrl()
53 static inline void tegra_fc_cpu_csr(int cpu_id, uint32_t val) in tegra_fc_cpu_csr() argument
55 mmio_write_32(flowctrl_offset_cpu_csr[cpu_id], val); in tegra_fc_cpu_csr()
56 val = mmio_read_32(flowctrl_offset_cpu_csr[cpu_id]); in tegra_fc_cpu_csr()
59 static inline void tegra_fc_halt_cpu(int cpu_id, uint32_t val) in tegra_fc_halt_cpu() argument
61 mmio_write_32(flowctrl_offset_halt_cpu[cpu_id], val); in tegra_fc_halt_cpu()
62 val = mmio_read_32(flowctrl_offset_halt_cpu[cpu_id]); in tegra_fc_halt_cpu()
65 static void tegra_fc_prepare_suspend(int cpu_id, uint32_t csr) in tegra_fc_prepare_suspend() argument
[all …]
/external/arm-trusted-firmware/plat/rockchip/rk3288/drivers/pmu/
Dpmu.c208 static int cpus_power_domain_on(uint32_t cpu_id) in cpus_power_domain_on() argument
212 cpu_pd = PD_CPU0 + cpu_id; in cpus_power_domain_on()
218 BIT(cpu_id) | (BIT(cpu_id) << 16)); in cpus_power_domain_on()
226 mmio_write_32(CRU_BASE + CRU_SOFTRSTS_CON(0), BIT(cpu_id) << 16); in cpus_power_domain_on()
231 static int cpus_power_domain_off(uint32_t cpu_id) in cpus_power_domain_off() argument
233 uint32_t cpu_pd = PD_CPU0 + cpu_id; in cpus_power_domain_off()
238 if (check_cpu_wfie(cpu_id, CKECK_WFEI_MSK)) in cpus_power_domain_off()
243 BIT(cpu_id) | (BIT(cpu_id) << 16)); in cpus_power_domain_off()
278 uint32_t cpu_id = plat_core_pos_by_mpidr(mpidr); in rockchip_soc_cores_pwr_dm_on() local
280 assert(cpu_id < PLATFORM_CORE_COUNT); in rockchip_soc_cores_pwr_dm_on()
[all …]
/external/ltp/testcases/kernel/syscalls/getcpu/
Dgetcpu01.c23 static inline int get_cpu(unsigned *cpu_id, in get_cpu() argument
28 return tst_syscall(__NR_getcpu, cpu_id, node_id, cache_struct); in get_cpu()
30 *cpu_id = sched_getcpu(); in get_cpu()
82 static unsigned int get_nodeid(unsigned int cpu_id) in get_nodeid() argument
110 if (cpu == cpu_id) { in get_nodeid()
126 unsigned int cpu_id, node_id = 0; in run() local
137 TEST(get_cpu(&cpu_id, &node_id, NULL)); in run()
139 if (cpu_id != cpu_set) in run()
142 cpu_set, cpu_id); in run()
151 " cpuid:%d, node id:%d", cpu_id, in run()
/external/arm-trusted-firmware/plat/rockchip/px30/drivers/pmu/
Dpmu.c108 static inline uint32_t get_cpus_pwr_domain_cfg_info(uint32_t cpu_id) in get_cpus_pwr_domain_cfg_info() argument
110 assert(cpu_id < PLATFORM_CORE_COUNT); in get_cpus_pwr_domain_cfg_info()
111 return cores_pd_cfg_info[cpu_id]; in get_cpus_pwr_domain_cfg_info()
114 static inline void set_cpus_pwr_domain_cfg_info(uint32_t cpu_id, uint32_t value) in set_cpus_pwr_domain_cfg_info() argument
116 assert(cpu_id < PLATFORM_CORE_COUNT); in set_cpus_pwr_domain_cfg_info()
117 cores_pd_cfg_info[cpu_id] = value; in set_cpus_pwr_domain_cfg_info()
119 flush_dcache_range((uintptr_t)&cores_pd_cfg_info[cpu_id], in set_cpus_pwr_domain_cfg_info()
387 static int cpus_power_domain_on(uint32_t cpu_id) in cpus_power_domain_on() argument
391 cpu_pd = PD_CPU0 + cpu_id; in cpus_power_domain_on()
392 cfg_info = get_cpus_pwr_domain_cfg_info(cpu_id); in cpus_power_domain_on()
[all …]
/external/arm-trusted-firmware/plat/xilinx/versal/
Dplat_psci.c24 unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr); in versal_pwr_domain_on() local
29 if (cpu_id == -1) in versal_pwr_domain_on()
32 proc = pm_get_proc(cpu_id); in versal_pwr_domain_on()
53 unsigned int cpu_id = plat_my_core_pos(); in versal_pwr_domain_suspend() local
54 const struct pm_proc *proc = pm_get_proc(cpu_id); in versal_pwr_domain_suspend()
86 unsigned int cpu_id = plat_my_core_pos(); in versal_pwr_domain_suspend_finish() local
87 const struct pm_proc *proc = pm_get_proc(cpu_id); in versal_pwr_domain_suspend_finish()
153 unsigned int cpu_id = plat_my_core_pos(); in versal_pwr_domain_off() local
154 const struct pm_proc *proc = pm_get_proc(cpu_id); in versal_pwr_domain_off()
/external/arm-trusted-firmware/plat/xilinx/zynqmp/
Dplat_psci.c34 unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr); in zynqmp_pwr_domain_on() local
39 if (cpu_id == -1) in zynqmp_pwr_domain_on()
42 proc = pm_get_proc(cpu_id); in zynqmp_pwr_domain_on()
54 unsigned int cpu_id = plat_my_core_pos(); in zynqmp_pwr_domain_off() local
55 const struct pm_proc *proc = pm_get_proc(cpu_id); in zynqmp_pwr_domain_off()
78 unsigned int cpu_id = plat_my_core_pos(); in zynqmp_pwr_domain_suspend() local
79 const struct pm_proc *proc = pm_get_proc(cpu_id); in zynqmp_pwr_domain_suspend()
109 unsigned int cpu_id = plat_my_core_pos(); in zynqmp_pwr_domain_suspend_finish() local
110 const struct pm_proc *proc = pm_get_proc(cpu_id); in zynqmp_pwr_domain_suspend_finish()
/external/arm-trusted-firmware/plat/rockchip/common/
Dplat_topology.c24 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
26 cpu_id = mpidr & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
33 cpu_id += (cluster_id >> PLAT_RK_CLST_TO_CPUID_SHIFT); in plat_core_pos_by_mpidr()
35 if (cpu_id >= PLATFORM_CORE_COUNT) in plat_core_pos_by_mpidr()
38 return cpu_id; in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/intel/soc/common/
Dsocfpga_psci.c40 unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr); in socfpga_pwr_domain_on() local
44 if (cpu_id == -1) in socfpga_pwr_domain_on()
47 mmio_write_64(PLAT_CPUID_RELEASE, cpu_id); in socfpga_pwr_domain_on()
50 mmio_setbits_32(SOCFPGA_RSTMGR(MPUMODRST), 1 << cpu_id); in socfpga_pwr_domain_on()
74 unsigned int cpu_id = plat_my_core_pos(); in socfpga_pwr_domain_suspend() local
81 mmio_setbits_32(SOCFPGA_RSTMGR(MPUMODRST), 1 << cpu_id); in socfpga_pwr_domain_suspend()
113 unsigned int cpu_id = plat_my_core_pos(); in socfpga_pwr_domain_suspend_finish() local
120 mmio_clrbits_32(SOCFPGA_RSTMGR(MPUMODRST), 1 << cpu_id); in socfpga_pwr_domain_suspend_finish()
/external/u-boot/arch/arm/mach-zynq/
Dcpu.c114 int cpu_id = cpu_desc_id(); in arch_early_init_r() local
116 if (cpu_id < 0) in arch_early_init_r()
119 fpga.size = zynq_fpga_descs[cpu_id].fpga_size; in arch_early_init_r()
120 fpga.name = zynq_fpga_descs[cpu_id].devicename; in arch_early_init_r()
132 int cpu_id = cpu_desc_id(); in print_cpuinfo() local
134 if (cpu_id < 0) in print_cpuinfo()
141 printf("CPU: Zynq %s\n", zynq_fpga_descs[cpu_id].devicename); in print_cpuinfo()
/external/perfetto/protos/perfetto/trace/ftrace/
Dpower.proto10 optional uint32 cpu_id = 2; field
15 optional uint32 cpu_id = 3; field
19 optional uint32 cpu_id = 2; field
24 optional uint64 cpu_id = 3; field
29 optional uint64 cpu_id = 3; field
34 optional uint64 cpu_id = 3; field
/external/arm-trusted-firmware/plat/renesas/rcar/
Dplat_topology.c26 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
34 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
39 if (cluster_id == 0 && cpu_id >= PLATFORM_CLUSTER0_CORE_COUNT) in plat_core_pos_by_mpidr()
42 if (cluster_id == 1 && cpu_id >= PLATFORM_CLUSTER1_CORE_COUNT) in plat_core_pos_by_mpidr()
45 return (cpu_id + cluster_id * PLATFORM_CLUSTER0_CORE_COUNT); in plat_core_pos_by_mpidr()
/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dpmu.c474 static inline uint32_t get_cpus_pwr_domain_cfg_info(uint32_t cpu_id) in get_cpus_pwr_domain_cfg_info() argument
476 assert(cpu_id < PLATFORM_CORE_COUNT); in get_cpus_pwr_domain_cfg_info()
477 return core_pm_cfg_info[cpu_id]; in get_cpus_pwr_domain_cfg_info()
480 static inline void set_cpus_pwr_domain_cfg_info(uint32_t cpu_id, uint32_t value) in set_cpus_pwr_domain_cfg_info() argument
482 assert(cpu_id < PLATFORM_CORE_COUNT); in set_cpus_pwr_domain_cfg_info()
483 core_pm_cfg_info[cpu_id] = value; in set_cpus_pwr_domain_cfg_info()
485 flush_dcache_range((uintptr_t)&core_pm_cfg_info[cpu_id], in set_cpus_pwr_domain_cfg_info()
490 static int cpus_power_domain_on(uint32_t cpu_id) in cpus_power_domain_on() argument
493 uint32_t cpu_pd = PD_CPUL0 + cpu_id; in cpus_power_domain_on()
502 cfg_info = get_cpus_pwr_domain_cfg_info(cpu_id); in cpus_power_domain_on()
[all …]
/external/arm-trusted-firmware/plat/rockchip/common/drivers/pmu/
Dpmu_com.h80 static int check_cpu_wfie(uint32_t cpu_id, uint32_t wfie_msk) in check_cpu_wfie() argument
84 if (cpu_id >= PLATFORM_CLUSTER0_CORE_COUNT) { in check_cpu_wfie()
86 cpu_id -= PLATFORM_CLUSTER0_CORE_COUNT; in check_cpu_wfie()
103 wfie_msk <<= (clstb_cpu_wfe + cpu_id); in check_cpu_wfie()
105 wfie_msk <<= (clstl_cpu_wfe + cpu_id); in check_cpu_wfie()
115 cluster_id, cpu_id, wfie_msk); in check_cpu_wfie()
/external/bcc/examples/networking/xdp/
Dxdp_redirect_cpu.py24 cpu_id = int(sys.argv[2]) variable
27 if (cpu_id > max_cpu):
72 dest[0] = ct.c_uint32(cpu_id)
75 cpumap[cpu_id] = ct.c_uint32(192)
89 print("{} pkt/s to CPU {}".format(delta, cpu_id))

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