| /external/google-breakpad/src/processor/ |
| D | contained_range_map_unittest.cc | 57 ContainedRangeMap<unsigned int, int> crm; in RunTests() local
61 ASSERT_TRUE (crm.StoreRange(10, 10, 1)); in RunTests()
62 ASSERT_FALSE(crm.StoreRange(10, 10, 2)); // exactly equal to 1 in RunTests()
63 ASSERT_FALSE(crm.StoreRange(11, 10, 3)); // begins inside 1 and extends up in RunTests()
64 ASSERT_FALSE(crm.StoreRange( 9, 10, 4)); // begins below 1 and ends inside in RunTests()
65 ASSERT_TRUE (crm.StoreRange(11, 9, 5)); // contained by existing in RunTests()
66 ASSERT_TRUE (crm.StoreRange(12, 7, 6)); in RunTests()
67 ASSERT_TRUE (crm.StoreRange( 9, 12, 7)); // contains existing in RunTests()
68 ASSERT_TRUE (crm.StoreRange( 9, 13, 8)); in RunTests()
69 ASSERT_TRUE (crm.StoreRange( 8, 14, 9)); in RunTests()
[all …]
|
| /external/kernel-headers/original/uapi/asm-arm/asm/ |
| D | kvm.h | 166 #define __ARM_CP15_REG(op1,crn,crm,op2) \ argument
170 ARM_CP15_REG_SHIFT_MASK(crm, CRM) | \
175 #define __ARM_CP15_REG64(op1,crm) \ argument
176 (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64)
|
| /external/kernel-headers/original/uapi/asm-arm64/asm/ |
| D | kvm.h | 208 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ argument
213 ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | \
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 21 class AT<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
31 let Encoding{6-3} = crm;
80 class DC<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
90 let Encoding{6-3} = crm;
107 class IC<string name, bits<3> op1, bits<4> crn, bits<4> crm, bits<3> op2,
116 let Encoding{6-3} = crm;
216 class TLBI<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
226 let Encoding{6-3} = crm;
269 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
279 let Encoding{6-3} = crm;
[all …]
|
| /external/grpc-grpc/src/core/lib/surface/ |
| D | server.cc | 1099 channel_registered_method* crm; in grpc_server_setup_transport() local
1155 crm = &chand->registered_methods[(hash + probes) % slots]; in grpc_server_setup_transport()
1156 crm->server_registered_method = rm; in grpc_server_setup_transport()
1157 crm->flags = rm->flags; in grpc_server_setup_transport()
1158 crm->has_host = has_host; in grpc_server_setup_transport()
1160 crm->host = host; in grpc_server_setup_transport()
1162 crm->method = method; in grpc_server_setup_transport()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 21 class AT<string name, bits<3> op1, bits<4> crn, bits<4> crm,
30 let Encoding{6-3} = crm;
82 class DC<string name, bits<3> op1, bits<4> crn, bits<4> crm,
91 let Encoding{6-3} = crm;
112 class IC<string name, bits<3> op1, bits<4> crn, bits<4> crm, bits<3> op2,
121 let Encoding{6-3} = crm;
321 class TLBI<string name, bits<3> op1, bits<4> crn, bits<4> crm,
330 let Encoding{6-3} = crm;
427 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
437 let Encoding{6-3} = crm;
[all …]
|
| /external/v8/src/codegen/arm/ |
| D | assembler-arm.h | 646 CRegister crm, int opcode_2, Condition cond = al);
649 CRegister crm,
653 CRegister crm, int opcode_2 = 0, Condition cond = al);
656 CRegister crm,
660 CRegister crm, int opcode_2 = 0, Condition cond = al);
663 CRegister crm,
|
| D | assembler-arm.cc | 2297 CRegister crn, CRegister crm, int opcode_2, in cdp() argument
2301 crd.code() * B12 | coproc * B8 | (opcode_2 & 7) * B5 | crm.code()); in cdp()
2305 CRegister crn, CRegister crm, int opcode_2) { in cdp2() argument
2306 cdp(coproc, opcode_1, crd, crn, crm, opcode_2, kSpecialCondition); in cdp2()
2310 CRegister crn, CRegister crm, int opcode_2, in mcr() argument
2314 rd.code() * B12 | coproc * B8 | (opcode_2 & 7) * B5 | B4 | crm.code()); in mcr()
2318 CRegister crn, CRegister crm, int opcode_2) { in mcr2() argument
2319 mcr(coproc, opcode_1, rd, crn, crm, opcode_2, kSpecialCondition); in mcr2()
2323 CRegister crn, CRegister crm, int opcode_2, in mrc() argument
2327 rd.code() * B12 | coproc * B8 | (opcode_2 & 7) * B5 | B4 | crm.code()); in mrc()
[all …]
|
| /external/v8/src/diagnostics/arm/ |
| D | disasm-arm.cc | 1638 int crm = instr->Bits(3, 0); in DecodeTypeCP15() local
1644 if ((crm == 10) && (opc2 == 5)) { in DecodeTypeCP15()
1646 } else if ((crm == 10) && (opc2 == 4)) { in DecodeTypeCP15()
1648 } else if ((crm == 5) && (opc2 == 4)) { in DecodeTypeCP15()
|
| /external/vixl/src/aarch64/ |
| D | constants-aarch64.h | 388 template<int op0, int op1, int crn, int crm, int op2>
395 (crm << CRm_offset) |
409 template<int op1, int crn, int crm, int op2>
415 (crm << CRm_offset) |
|
| D | macro-assembler-aarch64.h | 2055 void Sys(int op1, int crn, int crm, int op2, const Register& rt = xzr) {
2058 sys(op1, crn, crm, op2, rt);
|
| D | assembler-aarch64.h | 2180 void sys(int op1, int crn, int crm, int op2, const Register& xt = xzr);
|
| D | assembler-aarch64.cc | 1872 void Assembler::sys(int op1, int crn, int crm, int op2, const Register& xt) { in sys() argument
1874 Emit(SYS | ImmSysOp1(op1) | CRn(crn) | CRm(crm) | ImmSysOp2(op2) | Rt(xt)); in sys()
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 1515 uint64_t crm = fieldFromInstruction(insn, 8, 4); in DecodeSystemPStateInstruction() local
1520 pstate_field == AArch64PState::UAO) && crm > 1) in DecodeSystemPStateInstruction()
1524 Inst.addOperand(MCOperand::createImm(crm)); in DecodeSystemPStateInstruction()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 1713 uint64_t crm = fieldFromInstruction(insn, 8, 4); in DecodeSystemPStateInstruction() local
1718 pstate_field == AArch64PState::UAO) && crm > 1) in DecodeSystemPStateInstruction()
1722 Inst.addOperand(MCOperand::createImm(crm)); in DecodeSystemPStateInstruction()
|
| /external/capstone/arch/AArch64/ |
| D | AArch64Disassembler.c | 1621 uint64_t crm = fieldFromInstruction(insn, 8, 4); in DecodeSystemPStateInstruction() local
1626 MCOperand_CreateImm0(Inst, crm); in DecodeSystemPStateInstruction()
|
| /external/cldr/tools/java/org/unicode/cldr/util/data/ |
| D | iso-639-3-macrolanguages.tab | 63 cre crm A
|
| D | language_script_raw.txt | 162 crm Moose Cree primary Cans Unified Canadian Aboriginal Syllabics
|
| D | country_language_population_raw.txt | 185 Canada CA "35,881,659" 99% "1,774,000,000,000" recognized Moose Cree crm "4,500" "Canadian census…
|
| /external/u-boot/board/qualcomm/dragonboard820c/ |
| D | readme.txt | 129 S - OEM_IMAGE_VERSION_STRING=crm-ubuntu68
|
| /external/v8/src/execution/arm/ |
| D | simulator-arm.cc | 3491 int crm = instr->Bits(3, 0); in DecodeTypeCP15() local
3497 if (((crm == 10) && (opc2 == 5)) || // CP15DMB in DecodeTypeCP15()
3498 ((crm == 10) && (opc2 == 4)) || // CP15DSB in DecodeTypeCP15()
3499 ((crm == 5) && (opc2 == 4))) { // CP15ISB in DecodeTypeCP15()
|
| /external/icu/icu4c/source/data/misc/ |
| D | likelySubtags.txt | 257 crm{"crm_Cans_CA"}
|
| D | langInfo.txt | 1115 "crm","Cans","CA",
|
| D | supplementalData.txt | 12491 crm{
27689 crm{
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3047 System instruction with pre-encoded op (op1:crn:crm:op2).
3056 void sys(int op1, int crn, int crm, int op2, const Register& xt = xzr)
|