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Searched refs:cwl_value (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training.c94 u32 if_id, u32 cl_value, u32 cwl_value);
1199 u32 cl_value = 0, cwl_value = 0, mem_mask = 0, val = 0, in ddr3_tip_freq_set() local
1258 cwl_value = in ddr3_tip_freq_set()
1267 cwl_value = mv_ddr_cwl_calc(tclk); in ddr3_tip_freq_set()
1268 if (cwl_value == 0) { in ddr3_tip_freq_set()
1274 cwl_value = mv_ddr_cwl_val_get(speed_bin_index, frequency); in ddr3_tip_freq_set()
1391 (cwl_mask_table[cwl_value] << 12), 0x7000)); in ddr3_tip_freq_set()
1525 val = (cwl_mask_table[cwl_value] << 3) | g_rtt_wr; in ddr3_tip_freq_set()
1538 val = ((cl_value - cwl_value + 1) << 4) | in ddr3_tip_freq_set()
1539 ((cl_value - cwl_value + 6) << 8) | in ddr3_tip_freq_set()
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