/external/u-boot/drivers/ram/rockchip/ |
D | sdram_common.c | 44 bg = (cap_info->dbw == 0) ? 2 : 1; in sdram_print_ddr_info() 81 printdec(8 << cap_info->dbw); in sdram_print_ddr_info() 137 bg = (cap_info->dbw == 0) ? 2 : 1; in sdram_get_cs_cap() 182 *p_os_reg2 |= SYS_REG_ENC_DBW(cap_info->dbw, channel); in sdram_org_config() 255 u32 dbw; in sdram_detect_bg() local 264 dbw = 0; in sdram_detect_bg() 266 dbw = 1; in sdram_detect_bg() 268 cap_info->dbw = dbw; in sdram_detect_bg() 280 cap_info->dbw = 1; in sdram_detect_dbw() 313 cap_info->dbw = (die_bw_0 > die_bw_1) ? die_bw_0 : die_bw_1; in sdram_detect_dbw() [all …]
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D | sdram-px30-ddr3-detect-333.inc | 8 .dbw = 0x0,
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D | sdram-px30-lpddr3-detect-333.inc | 8 .dbw = 0x0,
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D | sdram-px30-ddr4-detect-333.inc | 8 .dbw = 0x0,
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D | sdram-px30-lpddr2-detect-333.inc | 8 .dbw = 0x0,
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D | sdram_pctl_px30.c | 154 switch (cap_info->dbw) { in pctl_remodify_sdram_params()
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D | sdram_rk322x.c | 592 sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(0); in dram_all_config() 607 sdram_params->ch[0].dbw = 1; in dram_cap_detect() 609 sdram_params->ch[0].dbw = 2; in dram_cap_detect()
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D | dmc-rk3368.c | 788 sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan); in dram_all_config() 852 params->chan.dbw = params->chan.dbw; /* 32bit wide bus */ in setup_sdram()
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D | sdram_px30.c | 207 die_bw = cap_info->dbw; in calculate_ddrconfig() 249 bg = (cap_info->dbw == 0) ? 2 : 1; in set_ctl_address_map()
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D | sdram_rk3188.c | 552 sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan); in dram_all_config() 600 sdram_params->ch[channel].dbw = sdram_params->ch[channel].bw; in sdram_rank_bw_detect()
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D | sdram_rk3288.c | 610 sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan); in dram_all_config() 654 sdram_params->ch[channel].dbw = sdram_params->ch[channel].bw; in sdram_rank_bw_detect()
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D | sdram_rk3328.c | 144 die_bw = cap_info->dbw; in calculate_ddrconfig()
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D | sdram-rk3399-lpddr4-400.inc | 15 .dbw = 0x1, 48 .dbw = 0x1,
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D | sdram-rk3399-lpddr4-800.inc | 15 .dbw = 0x1, 48 .dbw = 0x1,
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D | sdram_rk3399.c | 1554 (8 << params->ch[channel].cap_info.dbw); in set_cap_relate_config() 2917 params->ch[channel].cap_info.dbw = 32; in clear_channel_params()
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/external/u-boot/arch/arm/mach-rockchip/ |
D | sdram.c | 86 u32 dbw, dram_type; in rockchip_sdram_size() local 140 dbw = (sys_reg2 >> SYS_REG_DBW_SHIFT(ch)) & in rockchip_sdram_size() 142 bg = (dbw == 2) ? 2 : 1; in rockchip_sdram_size()
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/external/u-boot/arch/arm/include/asm/arch-rockchip/ |
D | sdram_rk3288.h | 21 u8 dbw; member
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D | sdram_common.h | 27 unsigned int dbw; member
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D | sdram_rk322x.h | 20 u8 dbw; member
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/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/ |
D | dram.h | 128 unsigned char dbw; member
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D | dram.c | 36 ch->dbw = SYS_REG_DEC_DBW(os_reg2_val, i); in dram_init()
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D | dfs.c | 93 die_bandwidth = 8 * (1 << ch->dbw); in get_cs_die_capability()
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/external/u-boot/drivers/ddr/fsl/ |
D | ctrl_regs.c | 792 unsigned int dbw; /* DRAM dta bus width */ in set_ddr_sdram_cfg() local 826 dbw = popts->data_bus_width; in set_ddr_sdram_cfg() 837 if (dbw == 0x1) in set_ddr_sdram_cfg() 846 acc_ecc_en = (dbw != 0 && ecc_en == 1) ? 1 : 0; in set_ddr_sdram_cfg() 855 | ((dbw & 0x3) << 19) in set_ddr_sdram_cfg()
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/external/u-boot/doc/device-tree-bindings/clock/ |
D | rockchip,rk3288-dmc.txt | 99 dbw
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/external/cldr/tools/java/org/unicode/cldr/util/data/ |
D | iso-639-3_Retirements.tab | 195 dwl Walo Kumbe Dogon S Split into Dogon, Bankan Tey (Walo) [dbw] and Dogon, Ben Tey (Beni) [dbt] …
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