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Searched refs:dbw (Results 1 – 25 of 32) sorted by relevance

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/external/u-boot/drivers/ram/rockchip/
Dsdram_common.c44 bg = (cap_info->dbw == 0) ? 2 : 1; in sdram_print_ddr_info()
81 printdec(8 << cap_info->dbw); in sdram_print_ddr_info()
137 bg = (cap_info->dbw == 0) ? 2 : 1; in sdram_get_cs_cap()
182 *p_os_reg2 |= SYS_REG_ENC_DBW(cap_info->dbw, channel); in sdram_org_config()
255 u32 dbw; in sdram_detect_bg() local
264 dbw = 0; in sdram_detect_bg()
266 dbw = 1; in sdram_detect_bg()
268 cap_info->dbw = dbw; in sdram_detect_bg()
280 cap_info->dbw = 1; in sdram_detect_dbw()
313 cap_info->dbw = (die_bw_0 > die_bw_1) ? die_bw_0 : die_bw_1; in sdram_detect_dbw()
[all …]
Dsdram-px30-ddr3-detect-333.inc8 .dbw = 0x0,
Dsdram-px30-lpddr3-detect-333.inc8 .dbw = 0x0,
Dsdram-px30-ddr4-detect-333.inc8 .dbw = 0x0,
Dsdram-px30-lpddr2-detect-333.inc8 .dbw = 0x0,
Dsdram_pctl_px30.c154 switch (cap_info->dbw) { in pctl_remodify_sdram_params()
Dsdram_rk322x.c592 sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(0); in dram_all_config()
607 sdram_params->ch[0].dbw = 1; in dram_cap_detect()
609 sdram_params->ch[0].dbw = 2; in dram_cap_detect()
Ddmc-rk3368.c788 sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan); in dram_all_config()
852 params->chan.dbw = params->chan.dbw; /* 32bit wide bus */ in setup_sdram()
Dsdram_px30.c207 die_bw = cap_info->dbw; in calculate_ddrconfig()
249 bg = (cap_info->dbw == 0) ? 2 : 1; in set_ctl_address_map()
Dsdram_rk3188.c552 sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan); in dram_all_config()
600 sdram_params->ch[channel].dbw = sdram_params->ch[channel].bw; in sdram_rank_bw_detect()
Dsdram_rk3288.c610 sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan); in dram_all_config()
654 sdram_params->ch[channel].dbw = sdram_params->ch[channel].bw; in sdram_rank_bw_detect()
Dsdram_rk3328.c144 die_bw = cap_info->dbw; in calculate_ddrconfig()
Dsdram-rk3399-lpddr4-400.inc15 .dbw = 0x1,
48 .dbw = 0x1,
Dsdram-rk3399-lpddr4-800.inc15 .dbw = 0x1,
48 .dbw = 0x1,
Dsdram_rk3399.c1554 (8 << params->ch[channel].cap_info.dbw); in set_cap_relate_config()
2917 params->ch[channel].cap_info.dbw = 32; in clear_channel_params()
/external/u-boot/arch/arm/mach-rockchip/
Dsdram.c86 u32 dbw, dram_type; in rockchip_sdram_size() local
140 dbw = (sys_reg2 >> SYS_REG_DBW_SHIFT(ch)) & in rockchip_sdram_size()
142 bg = (dbw == 2) ? 2 : 1; in rockchip_sdram_size()
/external/u-boot/arch/arm/include/asm/arch-rockchip/
Dsdram_rk3288.h21 u8 dbw; member
Dsdram_common.h27 unsigned int dbw; member
Dsdram_rk322x.h20 u8 dbw; member
/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/
Ddram.h128 unsigned char dbw; member
Ddram.c36 ch->dbw = SYS_REG_DEC_DBW(os_reg2_val, i); in dram_init()
Ddfs.c93 die_bandwidth = 8 * (1 << ch->dbw); in get_cs_die_capability()
/external/u-boot/drivers/ddr/fsl/
Dctrl_regs.c792 unsigned int dbw; /* DRAM dta bus width */ in set_ddr_sdram_cfg() local
826 dbw = popts->data_bus_width; in set_ddr_sdram_cfg()
837 if (dbw == 0x1) in set_ddr_sdram_cfg()
846 acc_ecc_en = (dbw != 0 && ecc_en == 1) ? 1 : 0; in set_ddr_sdram_cfg()
855 | ((dbw & 0x3) << 19) in set_ddr_sdram_cfg()
/external/u-boot/doc/device-tree-bindings/clock/
Drockchip,rk3288-dmc.txt99 dbw
/external/cldr/tools/java/org/unicode/cldr/util/data/
Diso-639-3_Retirements.tab195 dwl Walo Kumbe Dogon S Split into Dogon, Bankan Tey (Walo) [dbw] and Dogon, Ben Tey (Beni) [dbt] …

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