Searched refs:dimm_params (Results 1 – 7 of 7) sorted by relevance
15 const dimm_params_t *dimm_params, in compute_cas_latency() argument33 if (dimm_params[i].n_ranks) in compute_cas_latency()34 tmp &= dimm_params[i].caslat_x; in compute_cas_latency()74 const dimm_params_t *dimm_params, in compute_cas_latency() argument103 if (dimm_params[i].n_ranks) { in compute_cas_latency()105 temp2 |= 1 << dimm_params[i].caslat_x; in compute_cas_latency()106 temp2 |= 1 << dimm_params[i].caslat_x_minus_1; in compute_cas_latency()107 temp2 |= 1 << dimm_params[i].caslat_x_minus_2; in compute_cas_latency()136 if (!dimm_params[i].n_ranks) in compute_cas_latency()139 if (dimm_params[i].caslat_x == temp2) { in compute_cas_latency()[all …]
150 const dimm_params_t *dimm_params) in set_csn_config() argument171 if (dimm_params[dimm_number].n_ranks > 0) { in set_csn_config()191 if ((dimm_number == 0 && dimm_params[0].n_ranks > 1) || \ in set_csn_config()192 (dimm_number == 1 && dimm_params[1].n_ranks > 0)) in set_csn_config()196 if ((dimm_number == 0 && dimm_params[0].n_ranks > 2) || \ in set_csn_config()197 (dimm_number >= 1 && dimm_params[dimm_number].n_ranks > 0)) in set_csn_config()201 if ((dimm_number == 0 && dimm_params[0].n_ranks > 3) || \ in set_csn_config()202 (dimm_number == 1 && dimm_params[1].n_ranks > 1) || \ in set_csn_config()203 (dimm_number == 3 && dimm_params[3].n_ranks > 0)) in set_csn_config()215 ba_bits_cs_n = dimm_params[dimm_number].bank_addr_bits; in set_csn_config()[all …]
331 if (!pinfo->dimm_params[i][j].n_ranks) in __step_assign_addresses()333 dw = pinfo->dimm_params[i][j].primary_sdram_width; in __step_assign_addresses()348 dw = pinfo->dimm_params[i][j].data_width; in __step_assign_addresses()349 if (pinfo->dimm_params[i][j].n_ranks in __step_assign_addresses()380 rank_density = pinfo->dimm_params[first_ctrl][0].rank_density >> in __step_assign_addresses()436 pinfo->dimm_params[i][j].capacity >> dbw_cap_adj[i]; in __step_assign_addresses()437 pinfo->dimm_params[i][j].base_address = in __step_assign_addresses()461 pinfo->dimm_params[i][j].capacity >> dbw_cap_adj[i]; in __step_assign_addresses()462 pinfo->dimm_params[i][j].base_address = in __step_assign_addresses()528 &(pinfo->dimm_params[i][j]); in fsl_ddr_compute()[all …]
1338 check_n_ranks = pinfo->dimm_params[first_ctrl][0].n_ranks; in check_interleaving_options()1339 check_rank_density = pinfo->dimm_params[first_ctrl][0].rank_density; in check_interleaving_options()1340 check_n_row_addr = pinfo->dimm_params[first_ctrl][0].n_row_addr; in check_interleaving_options()1341 check_n_col_addr = pinfo->dimm_params[first_ctrl][0].n_col_addr; in check_interleaving_options()1344 dimm = &pinfo->dimm_params[i][0]; in check_interleaving_options()
221 dimm_params_t *p = &(pinfo->dimm_params[ctrl_num][dimm_num]); in fsl_ddr_dimm_parameters_edit()1737 &(pinfo->dimm_params[i][j])); in fsl_ddr_printinfo()2052 memcpy(&(pinfo->dimm_params[dst_ctlr_num][dst_dimm_num]), in fsl_ddr_interactive()2053 &(pinfo->dimm_params[src_ctlr_num][src_dimm_num]), in fsl_ddr_interactive()2054 sizeof(pinfo->dimm_params[0][0])); in fsl_ddr_interactive()
211 rank_density = pinfo->dimm_params[0][0].rank_density >> in step_assign_addresses()248 pinfo->dimm_params[i][j].capacity; in step_assign_addresses()249 pinfo->dimm_params[i][j].base_address = in step_assign_addresses()
62 dimm_params[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR]; member99 const dimm_params_t *dimm_params,