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Searched refs:div_mask (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/drivers/clk/imx/
Dclk-pllv3.c21 u32 div_mask; member
32 u32 div = (readl(pll->base) >> pll->div_shift) & pll->div_mask; in clk_pllv3_get_rate()
43 u32 div_mask) in imx_clk_pllv3() argument
65 pll->div_mask = div_mask; in imx_clk_pllv3()
Dclk.h55 u32 div_mask);
/external/u-boot/drivers/clk/mvebu/
Darmada-37xx-periph.c76 u32 div_mask[2]; member
117 .div_mask[0] = 7, \
118 .div_mask[1] = 7, \
132 .div_mask[0] = _m, \
146 .div_mask[0] = _m, \
166 .div_mask[0] = _m, \
181 .div_mask[0] = 7, \
182 .div_mask[1] = 7, \
280 reg = (reg >> clk->div_shift[idx]) & clk->div_mask[idx]; in get_div()
296 reg &= ~(clk->div_mask[idx] << clk->div_shift[idx]); in set_div_val()
[all …]
/external/u-boot/drivers/clk/
Dclk_sandbox_ccf.c24 u32 div_mask; member
53 u32 div_mask) in sandbox_clk_pllv3() argument
64 pll->div_mask = div_mask; in sandbox_clk_pllv3()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_action.c972 LLVMValueRef div_mask = lp_build_cmp(&bld_base->uint64_bld, in u64mod_emit_cpu() local
979 div_mask, in u64mod_emit_cpu()
985 div_mask, in u64mod_emit_cpu()
996 LLVMValueRef div_mask = lp_build_cmp(&bld_base->uint64_bld, in i64mod_emit_cpu() local
1003 div_mask, in i64mod_emit_cpu()
1009 div_mask, in i64mod_emit_cpu()
1021 LLVMValueRef div_mask = lp_build_cmp(&bld_base->uint64_bld, in u64div_emit_cpu() local
1028 div_mask, in u64div_emit_cpu()
1034 div_mask, in u64div_emit_cpu()
1046 LLVMValueRef div_mask = lp_build_cmp(&bld_base->int64_bld, in i64div_emit_cpu() local
[all …]
Dlp_bld_nir.c463 LLVMValueRef div_mask = lp_build_cmp(mask_bld, PIPE_FUNC_EQUAL, src2, in do_int_divide() local
468div_mask = LLVMBuildAnd(builder, div_mask, lp_build_const_int_vec(gallivm, int_bld->type, 0x7fffff… in do_int_divide()
471 div_mask, in do_int_divide()
476 LLVMValueRef not_div_mask = LLVMBuildNot(builder, div_mask, ""); in do_int_divide()
481 return LLVMBuildOr(builder, div_mask, result, ""); in do_int_divide()
492 LLVMValueRef div_mask = lp_build_cmp(int_bld, PIPE_FUNC_EQUAL, src2, in do_int_mod() local
495 div_mask, in do_int_mod()
498 return LLVMBuildOr(builder, div_mask, result, ""); in do_int_mod()
/external/u-boot/arch/arm/mach-exynos/
Dclock.c23 int32_t div_mask; member
452 div = (div >> bit_info->div_bit) & bit_info->div_mask; in exynos5_get_periph_rate()
546 div = (div >> bit_info->div_bit) & bit_info->div_mask; in exynos542x_get_periph_rate()
1516 unsigned div_mask = 0xf, pre_div_mask = 0xff; in exynos5420_set_spi_clk() local
1566 clrsetbits_le32(reg, div_mask << shift, (main & div_mask) << shift); in exynos5420_set_spi_clk()
/external/u-boot/include/
Dsandbox-clk.h33 u32 div_mask);