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/external/llvm/test/MC/Mips/
Dmacro-divu.s6 divu $25,$11
8 # CHECK-NOTRAP: divu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1b]
12 divu $24,$12
14 # CHECK-NOTRAP: divu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1b]
18 divu $25,$0
20 # CHECK-NOTRAP: divu $zero, $25, $zero # encoding: [0x03,0x20,0x00,0x1b]
24 divu $0,$9
25 # CHECK-NOTRAP: divu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1b]
27 divu $0,$0
28 # CHECK-NOTRAP: divu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1b]
[all …]
Dmacro-divu-bad.s11 divu $25, $11
14 divu $25, $0
17 divu $0,$0
Dmicromips-alu-instructions.s40 # CHECK-EL: divu $zero, $9, $7 # encoding: [0xe9,0x00,0x3c,0xbb]
83 # CHECK-EB: divu $zero, $9, $7 # encoding: [0x00,0xe9,0xbb,0x3c]
124 divu $0, $9, $7
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmacro-divu.s6 divu $25,$11
9 # CHECK-NOTRAP: divu $zero, $25, $11 # encoding: [0x03,0x2b,0x00,0x1b]
14 divu $24,$12
17 # CHECK-NOTRAP: divu $zero, $24, $12 # encoding: [0x03,0x0c,0x00,0x1b]
22 divu $25,$0
25 divu $0,$9
26 # CHECK-NOTRAP: divu $zero, $zero, $9 # encoding: [0x00,0x09,0x00,0x1b]
28 divu $0,$0
29 # CHECK-NOTRAP: divu $zero, $zero, $zero # encoding: [0x00,0x00,0x00,0x1b]
31 divu $4,$5,$6
[all …]
Dmacro-remu.s9 # CHECK-NOTRAP: divu $zero, $4, $5 # encoding: [0x1b,0x00,0x85,0x00]
13 # CHECK-TRAP: divu $zero, $4, $5 # encoding: [0x1b,0x00,0x85,0x00]
34 # CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
37 # CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
42 # CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
45 # CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
50 # CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
53 # CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
59 # CHECK-NOTRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
62 # CHECK-TRAP: divu $zero, $4, $1 # encoding: [0x1b,0x00,0x81,0x00]
[all …]
Dmacro-divu-bad.s11 divu $25, 11
14 divu $25, $0
17 divu $0,$0
Dmicromips-alu-instructions.s40 # CHECK-EL: divu $zero, $9, $7 # encoding: [0xe9,0x00,0x3c,0xbb]
83 # CHECK-EB: divu $zero, $9, $7 # encoding: [0x00,0xe9,0xbb,0x3c]
124 divu $0, $9, $7
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/
Dudiv.ll38 ; NOT-R6: divu $zero, $4, $5
42 ; R6: divu $2, $4, $5
45 ; MMR3: divu $zero, $4, $5
49 ; MMR6: divu $2, $4, $5
60 ; NOT-R6: divu $zero, $4, $5
64 ; R6: divu $2, $4, $5
67 ; MMR3: divu $zero, $4, $5
71 ; MMR6: divu $2, $4, $5
82 ; NOT-R6: divu $zero, $4, $5
86 ; R6: divu $2, $4, $5
[all …]
Durem.ll40 ; NOT-R6: divu $zero, $[[T1]], $[[T0]]
54 ; MMR3: divu $zero, $[[T1]], $[[T0]]
78 ; NOT-R2-R6: divu $zero, $[[T1]], $[[T0]]
86 ; R2-R5: divu $zero, $[[T1]], $[[T0]]
99 ; MMR3: divu $zero, $[[T1]], $[[T0]]
120 ; NOT-R2-R6: divu $zero, $[[T1]], $[[T0]]
128 ; R2-R5: divu $zero, $[[T1]], $[[T0]]
141 ; MMR3: divu $zero, $[[T1]], $[[T0]]
160 ; NOT-R6: divu $zero, $4, $5
167 ; MMR3: divu $zero, $4, $5
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dvector-arith.ll388 ; MIPS32: divu
389 ; MIPS32: divu
390 ; MIPS32: divu
391 ; MIPS32: divu
392 ; MIPS32: divu
393 ; MIPS32: divu
394 ; MIPS32: divu
395 ; MIPS32: divu
396 ; MIPS32: divu
397 ; MIPS32: divu
[all …]
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dudiv.ll40 ; NOT-R6: divu $zero, $4, $5
44 ; R6: divu $2, $4, $5
47 ; MMR3: divu $zero, $4, $5
51 ; MMR6: divu $2, $4, $5
62 ; NOT-R6: divu $zero, $4, $5
66 ; R6: divu $2, $4, $5
69 ; MMR3: divu $zero, $4, $5
73 ; MMR6: divu $2, $4, $5
84 ; NOT-R6: divu $zero, $4, $5
88 ; R6: divu $2, $4, $5
[all …]
Durem.ll42 ; NOT-R6: divu $zero, $[[T1]], $[[T0]]
57 ; MMR3: divu $zero, $[[T1]], $[[T0]]
80 ; NOT-R2-R6: divu $zero, $[[T1]], $[[T0]]
88 ; R2-R5: divu $zero, $[[T1]], $[[T0]]
101 ; MMR3: divu $zero, $[[T1]], $[[T0]]
122 ; NOT-R2-R6: divu $zero, $[[T1]], $[[T0]]
130 ; R2-R5: divu $zero, $[[T1]], $[[T0]]
143 ; MMR3: divu $zero, $[[T1]], $[[T0]]
162 ; NOT-R6: divu $zero, $4, $5
169 ; MMR3: divu $zero, $4, $5
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Ddivrem.ll88 ; ACC32: divu $zero, $4, $5
91 ; ACC64: divu $zero, $4, $5
94 ; GPR32: divu $2, $4, $5
97 ; GPR64: divu $2, $4, $5
114 ; ACC32: divu $zero, $4, $5
117 ; ACC64: divu $zero, $4, $5
182 ; ACC32: divu $zero, $4, $5
189 ; ACC64: divu $zero, $4, $5
200 ; GPR32-DAG: divu $2, $4, $5
208 ; GPR64-DAG: divu $2, $4, $5
[all …]
Dassertzext-trunc.ll23 ; PRE-R6: divu $zero, $4, $5
28 ; R6: divu $2, $4, $5
Ddivu.ll12 ; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
Dremu.ll13 ; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
/external/llvm/test/CodeGen/Mips/
Ddivrem.ll88 ; ACC32: divu $zero, $4, $5
91 ; ACC64: divu $zero, $4, $5
94 ; GPR32: divu $2, $4, $5
97 ; GPR64: divu $2, $4, $5
114 ; ACC32: divu $zero, $4, $5
117 ; ACC64: divu $zero, $4, $5
182 ; ACC32: divu $zero, $4, $5
189 ; ACC64: divu $zero, $4, $5
196 ; GPR32-DAG: divu $2, $4, $5
204 ; GPR64-DAG: divu $2, $4, $5
[all …]
Dassertzext-trunc.ll23 ; PRE-R6: divu $zero, $4, $5
28 ; R6: divu $2, $4, $5
Ddivu.ll12 ; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
Dremu.ll13 ; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Ddiv1.ll35 define void @divu() {
36 ; CHECK-LABEL: divu:
46 ; CHECK-DAG: divu $zero, $[[J]], $[[K]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/Fast-ISel/
Ddiv1.ll35 define void @divu() {
36 ; CHECK-LABEL: divu:
46 ; CHECK-DAG: divu $zero, $[[J]], $[[K]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/
Drv32m-valid.s27 # CHECK-INST: divu gp, a0, a1
29 divu gp, a0, a1 label
/external/capstone/suite/MC/Mips/
Dmicromips-alu-instructions.s.cs33 0xe9,0x00,0x3c,0xbb = divu $zero, $9, $7
Dmicromips-alu-instructions-EB.s.cs33 0x00,0xe9,0xbb,0x3c = divu $zero, $9, $7

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