Home
last modified time | relevance | path

Searched refs:dx0gcr (Results 1 – 11 of 11) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun8i_a23.c120 clrsetbits_le32(&mctl_phy->dx0gcr, 0x3800, 0x2000); in mctl_init()
141 clrbits_le32(&mctl_phy->dx0gcr, 0x600); in mctl_init()
Ddram_sun6i.c150 writel(MCTL_DX_GCR | MCTL_DX_GCR_EN, &mctl_phy->dx0gcr); in mctl_channel_init()
/external/u-boot/drivers/ram/stm32mp1/
Dstm32mp1_tuning.c391 clrbits_le32(&phy->dx0gcr, DDRPHYC_DXNGCR_DXEN); in bit_deskew()
758 setbits_le32(&phy->dx0gcr, DDRPHYC_DXNGCR_DXEN); in bit_deskew()
804 clrbits_le32(&phy->dx0gcr, DDRPHYC_DXNGCR_DXEN); in eye_training()
1224 clrbits_le32(&phy->dx0gcr, DDRPHYC_DXNGCR_DXEN); in read_dqs_gating()
Dstm32mp1_ddr.h124 u32 dx0gcr; member
Dstm32mp1_ddr_regs.h200 u32 dx0gcr; /* 0x1c0 Byte lane 0 General Configuration*/ member
Dstm32mp1_ddr.c156 DDRPHY_REG_REG(dx0gcr),
/external/arm-trusted-firmware/include/drivers/st/
Dstm32mp1_ddr.h120 uint32_t dx0gcr; member
Dstm32mp1_ddr_regs.h203 uint32_t dx0gcr; /* 0x1c0 Byte lane 0 General Configuration */ member
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Ddram_sun8i_a23.h227 u32 dx0gcr; /* 0x1c0 */ member
Ddram_sun6i.h214 u32 dx0gcr; /* 0x1c0 */ member
/external/arm-trusted-firmware/drivers/st/ddr/
Dstm32mp1_ddr.c136 DDRPHY_REG_REG(dx0gcr),