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/external/deqp/external/openglcts/modules/common/
DglcMisc.cpp188 GLuint f10; in floatToUnisgnedF10() local
201 f10 = (GLuint)(FLOAT10_MAX_BIASED_EXP) | (GLuint)(0x0000001F); in floatToUnisgnedF10()
206 f10 = 0x00000000; in floatToUnisgnedF10()
209 return f10; in floatToUnisgnedF10()
226 f10 = (GLuint)(FLOAT10_MAX_BIASED_EXP) | (GLuint)(mantissa >> 18); in floatToUnisgnedF10()
242 f10 = mantissa; in floatToUnisgnedF10()
246 f10 = ((exp - FLOAT10_MIN_BIASED_EXP_AS_SINGLE_FP_EXP) >> 18) | (mantissa >> 18); in floatToUnisgnedF10()
249 return f10; in floatToUnisgnedF10()
353 float unsignedF10ToFloat(GLuint f10) in unsignedF10ToFloat() argument
355 unsigned int mantissa = (unsigned int)(f10 & ((1 << 5) - 1)); in unsignedF10ToFloat()
[all …]
/external/webrtc/webrtc/modules/audio_processing/aec/
Daec_rdft_mips.c272 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cft1st_128_mips() local
511 [f8] "=&f" (f8), [f9] "=&f" (f9), [f10] "=&f" (f10), [f11] "=&f" (f11), in cft1st_128_mips()
521 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cftmdl_128_mips() local
628 f10 = rdft_w[3]; in cftmdl_128_mips()
713 : [a] "r" (a), [f9] "f" (f9), [f10] "f" (f10), [f11] "f" (f11), in cftmdl_128_mips()
800 : [a] "r" (a), [f9] "f" (f9), [f10] "f" (f10), [f11] "f" (f11), in cftmdl_128_mips()
929 float f1, f2, f3 ,f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14, f15; in rftfsub_128_mips() local
1041 [f9] "=&f" (f9), [f10] "=&f" (f10), [f11] "=&f" (f11), [f12] "=&f" (f12), in rftfsub_128_mips()
1056 float f1, f2, f3 ,f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14, f15; in rftbsub_128_mips() local
1171 [f9] "=&f" (f9), [f10] "=&f" (f10), [f11] "=&f" (f11), [f12] "=&f" (f12), in rftbsub_128_mips()
Daec_core_mips.c345 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13; in WebRtcAec_FilterFar_mips() local
432 [f9] "=&f" (f9), [f10] "=&f" (f10), [f11] "=&f" (f11), in WebRtcAec_FilterFar_mips()
465 float f0, f1, f2, f3, f4, f5, f6 ,f7, f8, f9, f10, f11, f12; in WebRtcAec_FilterAdaptation_mips() local
530 [f9] "=&f" (f9), [f10] "=&f" (f10), [f11] "=&f" (f11), in WebRtcAec_FilterAdaptation_mips()
/external/llvm/test/CodeGen/SystemZ/
Dframe-04.ll16 ; CHECK: std %f10, 200(%r15)
24 ; CHECK: .cfi_offset %f10, -184
33 ; CHECK: ld %f10, 200(%r15)
76 ; CHECK: std %f10, 184(%r15)
82 ; CHECK: .cfi_offset %f10, -184
91 ; CHECK: ld %f10, 184(%r15)
122 ; numerical order so the pair should be %f8+%f10.
128 ; CHECK: std %f10, 160(%r15)
130 ; CHECK: .cfi_offset %f10, -176
139 ; CHECK: ld %f10, 160(%r15)
[all …]
Dframe-07.ll17 ; CHECK-NOFP: stdy %f10, 4104(%r15)
25 ; CHECK-NOFP: .cfi_offset %f10, -184
34 ; CHECK-NOFP: ldy %f10, 4104(%r15)
51 ; CHECK-FP: stdy %f10, 4104(%r11)
60 ; CHECK-FP: ldy %f10, 4104(%r11)
138 ; CHECK-NOFP: std %f10, 8({{%r[1-5]}},%r15)
146 ; CHECK-NOFP: .cfi_offset %f10, -184
155 ; CHECK-NOFP: ld %f10, 8({{%r[1-5]}},%r15)
171 ; CHECK-FP: std %f10, 8({{%r[1-5]}},%r11)
179 ; CHECK-FP: .cfi_offset %f10, -184
[all …]
Dframe-02.ll15 ; CHECK: std %f10, 200(%r15)
23 ; CHECK: .cfi_offset %f10, -184
32 ; CHECK: ld %f10, 200(%r15)
99 ; CHECK: std %f10, 192(%r15)
106 ; CHECK: .cfi_offset %f10, -184
115 ; CHECK: ld %f10, 192(%r15)
178 ; CHECK-NOT: %f10
225 ; CHECK-NOT: %f10
Dframe-03.ll17 ; CHECK: std %f10, 200(%r15)
25 ; CHECK: .cfi_offset %f10, -184
34 ; CHECK: ld %f10, 200(%r15)
101 ; CHECK: std %f10, 192(%r15)
108 ; CHECK: .cfi_offset %f10, -184
117 ; CHECK: ld %f10, 192(%r15)
180 ; CHECK-NOT: %f10
227 ; CHECK-NOT: %f10
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dframe-04.ll16 ; CHECK: std %f10, 200(%r15)
24 ; CHECK: .cfi_offset %f10, -184
33 ; CHECK: ld %f10, 200(%r15)
76 ; CHECK: std %f10, 184(%r15)
82 ; CHECK: .cfi_offset %f10, -184
91 ; CHECK: ld %f10, 184(%r15)
122 ; numerical order so the pair should be %f8+%f10.
128 ; CHECK: std %f10, 160(%r15)
130 ; CHECK: .cfi_offset %f10, -176
139 ; CHECK: ld %f10, 160(%r15)
[all …]
Danyregcc-novec.ll18 ;CHECK: std %f10,
24 …{r13},~{r14},~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f1…
36 ;CHECK-NEXT: std %f10,
53 %a10 = call double asm sideeffect "", "={f10}"() nounwind
60 …call void asm sideeffect "", "{f0},{f1},{f2},{f3},{f4},{f5},{f6},{f7},{f8},{f9},{f10},{f11},{f12},…
Dframe-07.ll17 ; CHECK-NOFP: stdy %f10, 4104(%r15)
25 ; CHECK-NOFP: .cfi_offset %f10, -184
34 ; CHECK-NOFP: ldy %f10, 4104(%r15)
51 ; CHECK-FP: stdy %f10, 4104(%r11)
60 ; CHECK-FP: ldy %f10, 4104(%r11)
138 ; CHECK-NOFP: std %f10, 8({{%r[1-5]}},%r15)
146 ; CHECK-NOFP: .cfi_offset %f10, -184
155 ; CHECK-NOFP: ld %f10, 8({{%r[1-5]}},%r15)
171 ; CHECK-FP: std %f10, 8({{%r[1-5]}},%r11)
179 ; CHECK-FP: .cfi_offset %f10, -184
[all …]
Dframe-02.ll15 ; CHECK: std %f10, 200(%r15)
23 ; CHECK: .cfi_offset %f10, -184
32 ; CHECK: ld %f10, 200(%r15)
99 ; CHECK: std %f10, 192(%r15)
106 ; CHECK: .cfi_offset %f10, -184
115 ; CHECK: ld %f10, 192(%r15)
178 ; CHECK-NOT: %f10
225 ; CHECK-NOT: %f10
Dframe-03.ll17 ; CHECK: std %f10, 200(%r15)
25 ; CHECK: .cfi_offset %f10, -184
34 ; CHECK: ld %f10, 200(%r15)
101 ; CHECK: std %f10, 192(%r15)
108 ; CHECK: .cfi_offset %f10, -184
117 ; CHECK: ld %f10, 192(%r15)
180 ; CHECK-NOT: %f10
227 ; CHECK-NOT: %f10
/external/mesa3d/src/mesa/sparc/
Dnorm.S67 fmuls %f2, M2, %f10 ! FGM Group f5 available
72 fadds %f3, %f10, %f3 ! FGA Group f10 available
81 fmuls %f7, %f7, %f10 ! FGM Group f7 available
83 fadds %f6, %f10, %f6 ! FGA Group 4cyc stall f6,f10 available
132 fmuls %f2, M2, %f10 ! FGM Group f5 available
137 fadds %f3, %f10, %f3 ! FGA Group f10 available
208 fmuls %f7, %f7, %f10 ! FGM Group f7 available
210 fadds %f6, %f10, %f6 ! FGA Group 4cyc stall f6,f10 available
365 fmuls %f2, M2, %f10 ! FGM Group f5 available
370 fadds %f3, %f10, %f3 ! FGA Group f10 available
[all …]
Dxform.S89 fmuls %f8, M1, %f10 ! FGM Group f2 available
100 fadds %f10, M13, %f10 ! FGA Group f10 available
101 st %f10, [%g2 + 0x14] ! LSU
200 fmuls %f8, M1, %f10 ! FGM Group
207 fadds %f10, M13, %f12 ! FGA Group f10 available
545 fmuls %f8, M0, %f10 ! FGM Group f2 available
551 fadds %f10, M12, %f10 ! FGA Group f2, f10 available
557 fadds %f10, %f12, %f10 ! FGA Group f10 available
558 st %f10, [%g2 + 0x10] ! LSU
667 ld [%g1 + 0x04], %f10 ! LSU Group
[all …]
/external/libffi/testsuite/libffi.call/
Dmany_double.c23 double f10, in many() argument
31 (double) f6, (double) f7, (double) f8, (double) f9, (double) f10, in many()
35 return ((f1/f2+f3/f4+f5/f6+f7/f8+f9/f10+f11/f12) * f13); in many()
Dmany.c14 …loat f3, float f4, float f5, float f6, float f7, float f8, float f9, float f10, float f11, float f… in many() argument
19 (double) f6, (double) f7, (double) f8, (double) f9, (double) f10, in many()
23 return f1+f2+f3+f4+f5+f6+f7+f8+f9+f10+f11+f12+f13; in many()
Dmany_mixed.c27 double f10, in many() argument
34 return ((double) (i1 + i2 + i3 + i4 + i5 + i6) + (f1/f2+f3/f4+f5/f6+f7/f8+f9/f10+f11/f12) * f13); in many()
/external/python/cpython2/Modules/_ctypes/libffi/testsuite/libffi.call/
Dmany.c14 …loat f3, float f4, float f5, float f6, float f7, float f8, float f9, float f10, float f11, float f… in many() argument
19 (double) f6, (double) f7, (double) f8, (double) f9, (double) f10, in many()
23 return f1+f2+f3+f4+f5+f6+f7+f8+f9+f10+f11+f12+f13; in many()
/external/llvm/test/MC/SystemZ/
Dregs-good.s62 #CHECK: ler %f10, %f11 # encoding: [0x38,0xab]
71 ler %f10,%f11
80 #CHECK: ldr %f10, %f11 # encoding: [0x28,0xab]
89 ldr %f10,%f11
129 #CHECK: .cfi_offset %f10, 208
163 .cfi_offset %f10,208
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AVR/
Dcmp.ll84 declare void @f10()
96 tail call void @f10()
112 tail call void @f10()
128 tail call void @f10()
144 tail call void @f10()
/external/clang/test/Sema/
Dwarn-unused-function.c37 static void f10(void); // expected-warning{{unused}}
38 static void f10(void);
/external/clang/test/CodeGenCXX/
Dmangle-variadic-templates.cpp74 template<typename ...T> void f10(ArrayOfN<T...> &) {} in f10() function
77 template void f10<int, float>(int (&)[2]);
/external/clang/test/CXX/except/except.spec/
Dp5-virtual.cpp38 virtual void f10() noexcept(false);
74 virtual void f10() noexcept(false);
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/SystemZ/
Dregs-good.s62 #CHECK: ler %f10, %f11 # encoding: [0x38,0xab]
71 ler %f10,%f11
80 #CHECK: ldr %f10, %f11 # encoding: [0x28,0xab]
89 ldr %f10,%f11
166 #CHECK: .cfi_offset %f10, 208
232 .cfi_offset %f10,208
/external/libffi/src/ia64/
Dunix.S67 ldf.fill f10 = [in0], 32
210 (p7) stfs [in1] = f10, 8
234 (p7) stfd [in1] = f10, 16
258 (p7) stfe [in1] = f10, 32
312 stf.spill [r16] = f10, 32
439 (p7) ldfs f10 = [r16], 8
467 (p7) ldfd f10 = [r16], 16
495 (p7) ldfe f10 = [r16], 32

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