/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-xfail-mips64r3.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 71 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-xfail-mips64r2.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 71 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-xfail-mips64r3.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 75 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-xfail-mips64r5.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 75 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-xfail-mips64r5.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 71 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-xfail-mips64r2.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 75 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-xfail-mips32r5.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 76 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-xfail-mips32r2.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 76 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-xfail-mips32r3.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 76 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/llvm/test/MC/Mips/mips3/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/llvm/test/MC/Mips/mips2/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/llvm/test/MC/Mips/mips1/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/llvm/test/MC/Mips/mips4/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/ |
D | invalid-mips5-wrong-error.s | 19 … c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 30 … c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 45 … plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 … pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 48 … sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/llvm/test/MC/Mips/mips64r6/ |
D | invalid-mips5-wrong-error.s | 19 … c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 30 … c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 45 … plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 … pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 48 … sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-xfail-mips32r2.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 80 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-xfail-mips32r5.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 80 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-xfail-mips32r3.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 80 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
|
/external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
D | fpu_asm.h | 16 stfd f26,(stack_size + STACK_FRAME_MIN_SIZE - 40)(%r1); \ 36 lfd f26,(stack_size + STACK_FRAME_MIN_SIZE - 40)(%r1); \ 67 lfd f26,96(r3)
|
/external/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-xfail.txt | 38 0x46 0xda 0x08 0x3d # CHECK: c.nge.ps $f1, $f26 49 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 53 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20 73 0x46 0xdd 0xd0 0x6d # CHECK: plu.ps $f1, $f26, $f29 74 0x46 0xda 0xf2 0x6e # CHECK: pul.ps $f9, $f30, $f26 80 0x46 0xda 0x71 0x41 # CHECK: sub.ps $f5, $f14, $f26
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-xfail.txt | 38 0x46 0xda 0x08 0x3d # CHECK: c.nge.ps $f1, $f26 49 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 53 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20 73 0x46 0xdd 0xd0 0x6d # CHECK: plu.ps $f1, $f26, $f29 74 0x46 0xda 0xf2 0x6e # CHECK: pul.ps $f9, $f30, $f26 76 0x46 0xda 0x71 0x41 # CHECK: sub.ps $f5, $f14, $f26
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips1/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|