| /external/llvm/test/CodeGen/PowerPC/ |
| D | fast-isel-conversion.ll | 209 ; ELF64: fcfidus
212 ; ELF64LE: fcfidus
213 ; PPC970-NOT: fcfidus
229 ; ELF64: fcfidus
234 ; ELF64LE: fcfidus
236 ; PPC970-NOT: fcfidus
251 ; ELF64: fcfidus
255 ; ELF64LE: fcfidus
275 ; ELF64: fcfidus
279 ; ELF64LE: fcfidus
|
| D | i64-to-float.ll | 50 ; CHECK: fcfidus 1, [[REG]]
56 ; CHECK-VSX: fcfidus 1, [[REG]]
|
| D | i32-to-float.ll | 80 ; CHECK-A2: fcfidus 1, [[REG]]
86 ; CHECK-VSX: fcfidus 1, [[REG]]
|
| D | fp-to-int-to-fp.ll | 52 ; FPCVT: fcfidus 1, [[REG1]]
|
| D | no-extra-fp-conv-ldst.ll | 75 ; CHECK: fcfidus 1, [[REG3]]
|
| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding-fp.s.cs | 95 0xec,0x40,0x1f,0x9c = fcfidus 2, 3
96 0xec,0x40,0x1f,0x9d = fcfidus. 2, 3
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-fp.s | 310 # CHECK-BE: fcfidus 2, 3 # encoding: [0xec,0x40,0x1f,0x9c]
311 # CHECK-LE: fcfidus 2, 3 # encoding: [0x9c,0x1f,0x40,0xec]
312 fcfidus 2, 3
313 # CHECK-BE: fcfidus. 2, 3 # encoding: [0xec,0x40,0x1f,0x9d]
314 # CHECK-LE: fcfidus. 2, 3 # encoding: [0x9d,0x1f,0x40,0xec]
315 fcfidus. 2, 3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-fp.s | 330 # CHECK-BE: fcfidus 2, 3 # encoding: [0xec,0x40,0x1f,0x9c]
331 # CHECK-LE: fcfidus 2, 3 # encoding: [0x9c,0x1f,0x40,0xec]
332 fcfidus 2, 3
333 # CHECK-BE: fcfidus. 2, 3 # encoding: [0xec,0x40,0x1f,0x9d]
334 # CHECK-LE: fcfidus. 2, 3 # encoding: [0x9d,0x1f,0x40,0xec]
335 fcfidus. 2, 3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | fast-isel-conversion.ll | 179 ; CHECK: fcfidus
180 ; PPC970-NOT: fcfidus
196 ; CHECK: fcfidus
198 ; PPC970-NOT: fcfidus
213 ; CHECK: fcfidus
234 ; CHECK: fcfidus
|
| D | i64-to-float.ll | 66 ; CHECK: fcfidus 1, [[REG]]
72 ; CHECK-VSX: fcfidus 1, [[REG]]
|
| D | i32-to-float.ll | 80 ; CHECK-A2: fcfidus 1, [[REG]]
86 ; CHECK-VSX: fcfidus 1, [[REG]]
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-fp.txt | 282 # CHECK: fcfidus 2, 3
285 # CHECK: fcfidus. 2, 3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-fp.txt | 294 # CHECK: fcfidus 2, 3
297 # CHECK: fcfidus. 2, 3
|
| /external/v8/src/codegen/ppc/ |
| D | assembler-ppc.h | 984 void fcfidus(const DoubleRegister frt, const DoubleRegister frb,
|
| D | constants-ppc.h | 1542 V(fcfidus, FCFIDUS, 0xEC00079C) \
|
| D | assembler-ppc.cc | 1682 void Assembler::fcfidus(const DoubleRegister frt, const DoubleRegister frb, in fcfidus() function in v8::internal::Assembler
|
| D | macro-assembler-ppc.cc | 858 fcfidus(double_dst, double_dst); in ConvertUnsignedInt64ToFloat()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstr64Bit.td | 1166 "fcfidus", "$frD, $frB", IIC_FPGeneral,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstr64Bit.td | 1316 "fcfidus", "$frD, $frB", IIC_FPGeneral,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenAsmMatcher.inc | 4237 "\007fcfidus\005fcmpu\006fcpsgn\005fctid\006fctidu\007fctiduz\006fctidz\005"
5581 …{ 5801 /* fcfidus */, PPC::FCFIDUS, Convert__RegF4RC1_0__RegF8RC1_1, 0, { MCK_RegF4RC, MCK_RegF8RC…
5582 …{ 5801 /* fcfidus */, PPC::FCFIDUSo, Convert__RegF4RC1_1__RegF8RC1_2, 0, { MCK__DOT_, MCK_RegF4RC,…
|