| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding-fp.s.cs | 81 0xfc,0x40,0x1f,0x5e = fctiduz 2, 3
82 0xfc,0x40,0x1f,0x5f = fctiduz. 2, 3
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-fp.s | 266 # CHECK-BE: fctiduz 2, 3 # encoding: [0xfc,0x40,0x1f,0x5e]
267 # CHECK-LE: fctiduz 2, 3 # encoding: [0x5e,0x1f,0x40,0xfc]
268 fctiduz 2, 3
269 # CHECK-BE: fctiduz. 2, 3 # encoding: [0xfc,0x40,0x1f,0x5f]
270 # CHECK-LE: fctiduz. 2, 3 # encoding: [0x5f,0x1f,0x40,0xfc]
271 fctiduz. 2, 3
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | fp-to-int-to-fp.ll | 51 ; FPCVT: fctiduz [[REG1:[0-9]+]], 1
64 ; FPCVT: fctiduz [[REG1:[0-9]+]], 1
|
| D | fast-isel-conversion.ll | 487 ; ELF64: fctiduz
490 ; ELF64LE: fctiduz
493 ; PPC970-NOT: fctiduz
525 ; ELF64: fctiduz
528 ; ELF64LE: fctiduz
531 ; PPC970-NOT: fctiduz
|
| D | f32-to-i64.ll | 15 ; CHECK: fctiduz [[REG1:[0-9]+]], 1
|
| D | float-to-int.ll | 46 ; CHECK: fctiduz [[REG:[0-9]+]], 1
63 ; CHECK: fctiduz [[REG:[0-9]+]], 1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-fp.s | 279 # CHECK-BE: fctiduz 2, 3 # encoding: [0xfc,0x40,0x1f,0x5e]
280 # CHECK-LE: fctiduz 2, 3 # encoding: [0x5e,0x1f,0x40,0xfc]
281 fctiduz 2, 3
282 # CHECK-BE: fctiduz. 2, 3 # encoding: [0xfc,0x40,0x1f,0x5f]
283 # CHECK-LE: fctiduz. 2, 3 # encoding: [0x5f,0x1f,0x40,0xfc]
284 fctiduz. 2, 3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | f32-to-i64.ll | 15 ; CHECK: fctiduz [[REG1:[0-9]+]], 1
|
| D | float-to-int.ll | 63 ; CHECK: fctiduz [[REG:[0-9]+]], 1
86 ; CHECK: fctiduz [[REG:[0-9]+]], 1
|
| D | fast-isel-conversion.ll | 411 ; CHECK: fctiduz
414 ; PPC970-NOT: fctiduz
442 ; CHECK: fctiduz
445 ; PPC970-NOT: fctiduz
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-fp.txt | 240 # CHECK: fctiduz 2, 3
243 # CHECK: fctiduz. 2, 3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding-fp.txt | 246 # CHECK: fctiduz 2, 3
249 # CHECK: fctiduz. 2, 3
|
| /external/v8/src/codegen/ppc/ |
| D | assembler-ppc.h | 994 void fctiduz(const DoubleRegister frt, const DoubleRegister frb,
|
| D | constants-ppc.h | 1551 V(fctiduz, FCTIDUZ, 0xFC00075E) \
|
| D | assembler-ppc.cc | 1707 void Assembler::fctiduz(const DoubleRegister frt, const DoubleRegister frb, in fctiduz() function in v8::internal::Assembler
|
| D | macro-assembler-ppc.cc | 901 fctiduz(double_dst, double_input); in ConvertDoubleToUnsignedInt64()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstr64Bit.td | 1169 "fctiduz", "$frD, $frB", IIC_FPGeneral,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstr64Bit.td | 1319 "fctiduz", "$frD, $frB", IIC_FPGeneral,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenAsmMatcher.inc | 4237 "\007fcfidus\005fcmpu\006fcpsgn\005fctid\006fctidu\007fctiduz\006fctidz\005"
5590 …{ 5835 /* fctiduz */, PPC::FCTIDUZ, Convert__RegF8RC1_0__RegF8RC1_1, 0, { MCK_RegF8RC, MCK_RegF8RC…
5591 …{ 5835 /* fctiduz */, PPC::FCTIDUZo, Convert__RegF8RC1_1__RegF8RC1_2, 0, { MCK__DOT_, MCK_RegF8RC,…
|