| /external/dtc/libfdt/ |
| D | fdt_overlay.c | 309 int fixups; in overlay_update_local_references() local
311 fixups = fdt_path_offset(fdto, "/__local_fixups__"); in overlay_update_local_references()
312 if (fixups < 0) { in overlay_update_local_references()
314 if (fixups == -FDT_ERR_NOTFOUND) in overlay_update_local_references()
317 return fixups; in overlay_update_local_references()
323 return overlay_update_local_node_references(fdto, 0, fixups, in overlay_update_local_references()
|
| /external/llvm/test/MC/Mips/ |
| D | mips64eb-fixups.s | 3 .section .fixups,"",@progbits
27 # CHECK: Name: .fixups (12)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| D | mips64eb-fixups.s | 3 .section .fixups,"",@progbits
27 # CHECK: Name: .fixups (12)
|
| /external/u-boot/scripts/dtc/libfdt/ |
| D | fdt_overlay.c | 326 int fixups; in overlay_update_local_references() local
328 fixups = fdt_path_offset(fdto, "/__local_fixups__"); in overlay_update_local_references()
329 if (fixups < 0) { in overlay_update_local_references()
331 if (fixups == -FDT_ERR_NOTFOUND) in overlay_update_local_references()
334 return fixups; in overlay_update_local_references()
340 return overlay_update_local_node_references(fdto, 0, fixups, in overlay_update_local_references()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopStrengthReduce/ARM/ |
| D | 2012-06-15-lsr-noaddrmode.ll | 13 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
21 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
26 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
34 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ARM/ |
| D | 2012-06-15-lsr-noaddrmode.ll | 13 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
21 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
26 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
34 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssembler.h | 198 const FixupRefList &fixups() const { return Fixups; } in fixups() function
306 const FixupRefList &fixups() const { return Buffer.fixups(); } in fixups() function
|
| /external/llvm/test/MC/Hexagon/ |
| D | pcrel.s | 4 # make sure the fixups emitted match what is
|
| D | got.s | 4 # make sure the fixups emitted match what is
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/ |
| D | pcrel.s | 4 # make sure the fixups emitted match what is
|
| D | got.s | 4 # make sure the fixups emitted match what is
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
| D | reloc-bss.s | 2 # CHECK: LLVM ERROR: cannot have fixups in virtual section!
|
| /external/python/cpython2/PC/ |
| D | dllbase_nt.txt | 4 is selected, and the DLL subject to fixups. Apparently, these
5 fixups are very slow, and significant performance gains can be
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/MCTargetDesc/ |
| D | AVRFixupKinds.h | 134 namespace fixups {
|
| D | AVRMCCodeEmitter.cpp | 109 AVR::fixups::adjustBranchTarget(target); in encodeRelCondBrTarget()
219 AVR::fixups::adjustBranchTarget(Target); in encodeCallTarget()
|
| /external/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
| D | nvc0_program.h | 68 void *fixups; member
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Sparc/ |
| D | sparc-little-endian.s | 13 ! ...and that fixups are applied to the correct bytes.
|
| /external/llvm/test/MC/Sparc/ |
| D | sparc-little-endian.s | 13 ! ...and that fixups are applied to the correct bytes.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | arm-memory-instructions.s | 32 @ to the use of non-contiguous bit ranges for fixups in ARM. Once that's
|
| /external/llvm/test/MC/ARM/ |
| D | arm-memory-instructions.s | 32 @ to the use of non-contiguous bit ranges for fixups in ARM. Once that's
|
| D | elf-movt.s | 17 @@ make sure that the text section fixups are sane too
|
| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| D | nv50_program.h | 111 void *fixups; /* relocation records */ member
|
| D | nv50_program.c | 398 prog->fixups = info_out.bin.relocData; in nv50_program_translate()
507 if (prog->fixups) in nv50_program_upload_code()
508 nv50_ir_relocate_code(prog->fixups, prog->code, prog->code_base, 0, 0); in nv50_program_upload_code()
536 FREE(p->fixups); in nv50_program_destroy()
|
| /external/llvm/test/MC/COFF/ |
| D | switch-relocations.ll | 2 ; relax the fixups that are created for jump tables on x86-64. See PR7960.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/COFF/ |
| D | switch-relocations.ll | 2 ; relax the fixups that are created for jump tables on x86-64. See PR7960.
|