/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | flat.s | 205 flat_atomic_umax v[3:4], v5 label 210 flat_atomic_umax v1, v[3:4], v5 glc label
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D | gfx7_asm_all.s | 3453 flat_atomic_umax v[1:2], v2 label 3456 flat_atomic_umax v[254:255], v2 label 3459 flat_atomic_umax v[1:2], v255 label 3462 flat_atomic_umax v0, v[1:2], v2 glc label 3465 flat_atomic_umax v[1:2], v2 slc label
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D | gfx9_asm_all.s | 4090 flat_atomic_umax v[1:2], v2 offset:4095 label 4093 flat_atomic_umax v[254:255], v2 offset:4095 label 4096 flat_atomic_umax v[1:2], v255 offset:4095 label 4099 flat_atomic_umax v[1:2], v2 label 4102 flat_atomic_umax v[1:2], v2 offset:0 label 4105 flat_atomic_umax v[1:2], v2 offset:7 label 4108 flat_atomic_umax v0, v[1:2], v2 offset:4095 glc label 4111 flat_atomic_umax v[1:2], v2 offset:4095 slc label
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D | gfx8_asm_all.s | 3540 flat_atomic_umax v[1:2], v2 label 3543 flat_atomic_umax v[254:255], v2 label 3546 flat_atomic_umax v[1:2], v255 label 3549 flat_atomic_umax v0, v[1:2], v2 glc label 3552 flat_atomic_umax v[1:2], v2 slc label
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/external/llvm/test/MC/AMDGPU/ |
D | flat.s | 270 flat_atomic_umax v[3:4], v5 label 275 flat_atomic_umax v1, v[3:4], v5 glc label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | flat_atomics.ll | 361 ; CIVI: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 362 ; GFX9: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} offset:16{{$}} 371 ; CIVI: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}} 372 ; GFX9: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} offset:16 glc{{$}} 383 ; CIVI: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 384 ; GFX9: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} offset:16{{$}} 394 ; CIVI: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}} 395 ; GFX9: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} offset:16 glc{{$}} 407 ; GCN: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 415 ; GCN: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}} [all …]
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D | global_atomics.ll | 466 ; VI: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 478 ; VI: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}} 515 ; VI: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 526 ; VI: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}}
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/external/llvm/test/CodeGen/AMDGPU/ |
D | flat_atomics.ll | 325 ; GCN: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 334 ; GCN: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}} 345 ; GCN: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 355 ; GCN: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}} 367 ; GCN: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 375 ; GCN: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}} 385 ; GCN: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 394 ; GCN: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}}
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D | global_atomics.ll | 385 ; VI: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 396 ; VI: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}} 427 ; VI: flat_atomic_umax v[{{[0-9]+:[0-9]+}}], v{{[0-9]+$}} 437 ; VI: flat_atomic_umax [[RET:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], v{{[0-9]+}} glc{{$}}
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | flat_vi.txt | 93 # VI: flat_atomic_umax v[3:4], v5 ; encoding: [0x00,0x00,0x1c,0xdd,0x03,0x05,0x00,0x00] 96 # VI: flat_atomic_umax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x1d,0xdd,0x03,0x05,0x00,0x01]
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D | gfx9_dasm_all.txt | 3501 # CHECK: flat_atomic_umax v[1:2], v2 offset:4095 ; encoding: [0xff,0x0f,0x1c,0xdd,0x01,0x02,0x00… 3504 # CHECK: flat_atomic_umax v[254:255], v2 offset:4095 ; encoding: [0xff,0x0f,0x1c,0xdd,0xfe,0x02,… 3507 # CHECK: flat_atomic_umax v[1:2], v255 offset:4095 ; encoding: [0xff,0x0f,0x1c,0xdd,0x01,0xff,0x… 3510 # CHECK: flat_atomic_umax v[1:2], v2 ; encoding: [0x00,0x00,0x1c,0xdd,0x01,0x02,0x00,0x00] 3513 # CHECK: flat_atomic_umax v[1:2], v2 offset:7 ; encoding: [0x07,0x00,0x1c,0xdd,0x01,0x02,0x00,0x… 3516 # CHECK: flat_atomic_umax v0, v[1:2], v2 offset:4095 glc ; encoding: [0xff,0x0f,0x1d,0xdd,0x01,0… 3519 # CHECK: flat_atomic_umax v[1:2], v2 offset:4095 slc ; encoding: [0xff,0x0f,0x1e,0xdd,0x01,0x02,…
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D | gfx8_dasm_all.txt | 3063 # CHECK: flat_atomic_umax v[1:2], v2 ; encoding: [0x00,0x00,0x1c,0xdd,0x01,0x02,0x00,0x00] 3066 # CHECK: flat_atomic_umax v[254:255], v2 ; encoding: [0x00,0x00,0x1c,0xdd,0xfe,0x02,0x00,0x00] 3069 # CHECK: flat_atomic_umax v[1:2], v255 ; encoding: [0x00,0x00,0x1c,0xdd,0x01,0xff,0x00,0x00] 3072 # CHECK: flat_atomic_umax v0, v[1:2], v2 glc ; encoding: [0x00,0x00,0x1d,0xdd,0x01,0x02,0x00,0x0… 3075 # CHECK: flat_atomic_umax v[1:2], v2 slc ; encoding: [0x00,0x00,0x1e,0xdd,0x01,0x02,0x00,0x00]
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | flat_vi.txt | 117 # VI: flat_atomic_umax v[3:4], v5 ; encoding: [0x00,0x00,0x1c,0xdd,0x03,0x05,0x00,0x00] 120 # VI: flat_atomic_umax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x1d,0xdd,0x03,0x05,0x00,0x01]
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/external/llvm/lib/Target/AMDGPU/ |
D | CIInstructions.td | 178 flat<0x38, 0x47>, "flat_atomic_umax", VGPR_32, i32, atomic_umax_flat
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | FLATInstructions.td | 409 defm FLAT_ATOMIC_UMAX : FLAT_Atomic_Pseudo <"flat_atomic_umax",
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 199 …flat_atomic_umax dst, src0, src1 :ref:`glc<amdgpu_synid_glc>` :ref:`s…
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D | AMDGPUAsmGFX8.rst | 198 …flat_atomic_umax dst, src0, src1 :ref:`glc<amdgpu_synid_glc>` :ref:`s…
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D | AMDGPUAsmGFX9.rst | 206 …flat_atomic_umax dst, src0, src1 :ref:`flat_offset12<amdgpu_synid_fla…
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/external/mesa3d/src/amd/compiler/ |
D | aco_instruction_selection.cpp | 6524 op32 = global ? aco_opcode::global_atomic_umax : aco_opcode::flat_atomic_umax; in visit_global_atomic()
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