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/external/llvm/test/MC/AArch64/
Dneon-max-min-pairwise.s70 fmaxp v0.4h, v1.4h, v2.4h
71 fmaxp v31.8h, v15.8h, v16.8h
72 fmaxp v0.2s, v1.2s, v2.2s
73 fmaxp v31.4s, v15.4s, v16.4s
74 fmaxp v7.2d, v8.2d, v25.2d
Dfullfp16-neon-neg.s176 fmaxp v0.4h, v1.4h, v2.4h
178 fmaxp v31.8h, v15.8h, v16.8h
Dneon-diagnostics.s1161 fmaxp v0.2s, v1.2s, v2.4s
1162 fmaxp v0.8b, v1.8b, v2.8b
2879 fmaxp s0, v1.2d
2880 fmaxp d31, v2.2s
2881 fmaxp h3, v2.2s
Darm64-advsimd.s319 fmaxp.2s v0, v0, v0
389 ; CHECK: fmaxp.2s v0, v0, v0 ; encoding: [0x00,0xf4,0x20,0x2e]
454 fmaxp.4h v0, v0, v0
479 ; CHECK: fmaxp.4h v0, v0, v0 ; encoding: [0x00,0x34,0x40,0x2e]
504 fmaxp.8h v0, v0, v0
529 ; CHECK: fmaxp.8h v0, v0, v0 ; encoding: [0x00,0x34,0x40,0x6e]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-max-min-pairwise.s70 fmaxp v0.4h, v1.4h, v2.4h
71 fmaxp v31.8h, v15.8h, v16.8h
72 fmaxp v0.2s, v1.2s, v2.2s
73 fmaxp v31.4s, v15.4s, v16.4s
74 fmaxp v7.2d, v8.2d, v25.2d
Dfullfp16-neon-neg.s176 fmaxp v0.4h, v1.4h, v2.4h
178 fmaxp v31.8h, v15.8h, v16.8h
Dneon-diagnostics.s1166 fmaxp v0.2s, v1.2s, v2.4s
1167 fmaxp v0.8b, v1.8b, v2.8b
2819 fmaxp s0, v1.2d
2820 fmaxp d31, v2.2s
2821 fmaxp h3, v2.2s
Darm64-advsimd.s319 fmaxp.2s v0, v0, v0
389 ; CHECK: fmaxp.2s v0, v0, v0 ; encoding: [0x00,0xf4,0x20,0x2e]
454 fmaxp.4h v0, v0, v0
479 ; CHECK: fmaxp.4h v0, v0, v0 ; encoding: [0x00,0x34,0x40,0x2e]
504 fmaxp.8h v0, v0, v0
529 ; CHECK: fmaxp.8h v0, v0, v0 ; encoding: [0x00,0x34,0x40,0x6e]
/external/capstone/suite/MC/AArch64/
Dneon-max-min-pairwise.s.cs26 0x20,0xf4,0x22,0x2e = fmaxp v0.2s, v1.2s, v2.2s
27 0xff,0xf5,0x30,0x6e = fmaxp v31.4s, v15.4s, v16.4s
28 0x07,0xf5,0x79,0x6e = fmaxp v7.2d, v8.2d, v25.2d
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-fminv.ll30 ; CHECK: fmaxp s0, v0.2s
44 ; CHECK: fmaxp d0, v0.2d
Darm64-vmax.ll528 ;CHECK: fmaxp.2s
531 %tmp3 = call <2 x float> @llvm.aarch64.neon.fmaxp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
537 ;CHECK: fmaxp.4s
540 %tmp3 = call <4 x float> @llvm.aarch64.neon.fmaxp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
546 ;CHECK: fmaxp.2d
549 %tmp3 = call <2 x double> @llvm.aarch64.neon.fmaxp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
553 declare <2 x float> @llvm.aarch64.neon.fmaxp.v2f32(<2 x float>, <2 x float>) nounwind readnone
554 declare <4 x float> @llvm.aarch64.neon.fmaxp.v4f32(<4 x float>, <4 x float>) nounwind readnone
555 declare <2 x double> @llvm.aarch64.neon.fmaxp.v2f64(<2 x double>, <2 x double>) nounwind readnone
Darm64-neon-copy.ll1069 ; CHECK: fmaxp s{{[0-9]+}}, v{{[0-9]+}}.2s
1081 ; CHECK: fmaxp s{{[0-9]+}}, v{{[0-9]+}}.2s
/external/llvm/test/CodeGen/AArch64/
Darm64-fminv.ll30 ; CHECK: fmaxp s0, v0.2s
44 ; CHECK: fmaxp d0, v0.2d
Darm64-vmax.ll528 ;CHECK: fmaxp.2s
531 %tmp3 = call <2 x float> @llvm.aarch64.neon.fmaxp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
537 ;CHECK: fmaxp.4s
540 %tmp3 = call <4 x float> @llvm.aarch64.neon.fmaxp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
546 ;CHECK: fmaxp.2d
549 %tmp3 = call <2 x double> @llvm.aarch64.neon.fmaxp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
553 declare <2 x float> @llvm.aarch64.neon.fmaxp.v2f32(<2 x float>, <2 x float>) nounwind readnone
554 declare <4 x float> @llvm.aarch64.neon.fmaxp.v4f32(<4 x float>, <4 x float>) nounwind readnone
555 declare <2 x double> @llvm.aarch64.neon.fmaxp.v2f64(<2 x double>, <2 x double>) nounwind readnone
Darm64-neon-copy.ll1066 ; CHECK: fmaxp s{{[0-9]+}}, v{{[0-9]+}}.2s
1078 ; CHECK: fmaxp s{{[0-9]+}}, v{{[0-9]+}}.2s
/external/v8/src/codegen/arm64/
Dmacro-assembler-arm64.h272 V(fmaxp, Fmaxp) \
378 V(fmaxp, Fmaxp) \
Dassembler-arm64.h1557 void fmaxp(const VRegister& vd, const VRegister& vn);
1606 void fmaxp(const VRegister& vd, const VRegister& vn, const VRegister& vm);
/external/vixl/test/test-trace-reference/
Dlog-disasm2272 0x~~~~~~~~~~~~~~~~ 7e70f9d4 fmaxp d20, v14.2d
2273 0x~~~~~~~~~~~~~~~~ 7e30f852 fmaxp s18, v2.2s
2274 0x~~~~~~~~~~~~~~~~ 6e7ff6e9 fmaxp v9.2d, v23.2d, v31.2d
2275 0x~~~~~~~~~~~~~~~~ 2e3ff6c7 fmaxp v7.2s, v22.2s, v31.2s
2276 0x~~~~~~~~~~~~~~~~ 6e3df4f2 fmaxp v18.4s, v7.4s, v29.4s
Dlog-disasm-colour2272 0x~~~~~~~~~~~~~~~~ 7e70f9d4 fmaxp d20, v14.2d
2273 0x~~~~~~~~~~~~~~~~ 7e30f852 fmaxp s18, v2.2s
2274 0x~~~~~~~~~~~~~~~~ 6e7ff6e9 fmaxp v9.2d, v23.2d, v31.2d
2275 0x~~~~~~~~~~~~~~~~ 2e3ff6c7 fmaxp v7.2s, v22.2s, v31.2s
2276 0x~~~~~~~~~~~~~~~~ 6e3df4f2 fmaxp v18.4s, v7.4s, v29.4s
Dlog-cpufeatures-custom2271 0x~~~~~~~~~~~~~~~~ 7e70f9d4 fmaxp d20, v14.2d ### {FP, NEON} ###
2272 0x~~~~~~~~~~~~~~~~ 7e30f852 fmaxp s18, v2.2s ### {FP, NEON} ###
2273 0x~~~~~~~~~~~~~~~~ 6e7ff6e9 fmaxp v9.2d, v23.2d, v31.2d ### {FP, NEON} ###
2274 0x~~~~~~~~~~~~~~~~ 2e3ff6c7 fmaxp v7.2s, v22.2s, v31.2s ### {FP, NEON} ###
2275 0x~~~~~~~~~~~~~~~~ 6e3df4f2 fmaxp v18.4s, v7.4s, v29.4s ### {FP, NEON} ###
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc2623 __ fmaxp(d20, v14.V2D()); in GenerateTestSequenceNEONFP() local
2624 __ fmaxp(s18, v2.V2S()); in GenerateTestSequenceNEONFP() local
2625 __ fmaxp(v9.V2D(), v23.V2D(), v31.V2D()); in GenerateTestSequenceNEONFP() local
2626 __ fmaxp(v7.V2S(), v22.V2S(), v31.V2S()); in GenerateTestSequenceNEONFP() local
2627 __ fmaxp(v18.V4S(), v7.V4S(), v29.V4S()); in GenerateTestSequenceNEONFP() local
Dtest-cpu-features-aarch64.cc3255 TEST_FP_NEON(fmaxp_0, fmaxp(s0, v1.V2S()))
3256 TEST_FP_NEON(fmaxp_1, fmaxp(d0, v1.V2D()))
3257 TEST_FP_NEON(fmaxp_2, fmaxp(v0.V2S(), v1.V2S(), v2.V2S()))
3258 TEST_FP_NEON(fmaxp_3, fmaxp(v0.V4S(), v1.V4S(), v2.V4S()))
3259 TEST_FP_NEON(fmaxp_4, fmaxp(v0.V2D(), v1.V2D(), v2.V2D()))
3662 TEST_FP_NEON_NEONHALF(fmaxp_0, fmaxp(v0.V4H(), v1.V4H(), v2.V4H()))
3663 TEST_FP_NEON_NEONHALF(fmaxp_1, fmaxp(v0.V8H(), v1.V8H(), v2.V8H()))
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt599 # CHECK: fmaxp v29.2s, v28.2s, v25.2s
600 # CHECK: fmaxp v9.4s, v8.4s, v5.4s
601 # CHECK: fmaxp v11.2d, v10.2d, v7.2d
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt599 # CHECK: fmaxp v29.2s, v28.2s, v25.2s
600 # CHECK: fmaxp v9.4s, v8.4s, v5.4s
601 # CHECK: fmaxp v11.2d, v10.2d, v7.2d
/external/vixl/src/aarch64/
Dassembler-aarch64.h3576 void fmaxp(const VRegister& vd, const VRegister& vn, const VRegister& vm);
3579 void fmaxp(const VRegister& vd, const VRegister& vn);

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