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Searched refs:g_rtt_wr (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_init.c127 params.g_rtt_wr = TUNE_TRAINING_PARAMS_RTT_WR_1CS; in mv_ddr_training_params_set()
130 params.g_rtt_wr = TUNE_TRAINING_PARAMS_RTT_WR_2CS; in mv_ddr_training_params_set()
Dddr_topology_def.h197 u32 g_rtt_wr; member
Dddr3_training.c78 u32 g_rtt_wr = PARAM_UNDEFINED; variable
242 if (params->g_rtt_wr != PARAM_UNDEFINED) in ddr3_tip_tune_training_params()
243 g_rtt_wr = params->g_rtt_wr; in ddr3_tip_tune_training_params()
271 g_zpodt_ctrl, g_znodt_ctrl, g_rtt_nom, g_dic, g_odt_config, g_rtt_wr)); in ddr3_tip_tune_training_params()
556 data_value |= g_rtt_wr; in hws_ddr3_tip_init_controller()
1525 val = (cwl_mask_table[cwl_value] << 3) | g_rtt_wr; in ddr3_tip_freq_set()
1568 val = (cwl_mask_table[cwl_value] << 3) | g_rtt_wr; in ddr3_tip_freq_set()
Dddr3_init.h77 extern u32 g_rtt_wr;