Home
last modified time | relevance | path

Searched refs:gates (Results 1 – 25 of 35) sorted by relevance

12

/external/tensorflow/tensorflow/core/kernels/rnn/
Dlstm_ops_gpu.cu.cc85 __global__ void lstm_gates(const T* gates, const T* b, const T* cs_prev, in lstm_gates() argument
151 sigmoid_op(gates[0 * cell_size + gid] + b[0 * cell_size + act_id] + in lstm_gates()
155 sigmoid_op(gates[0 * cell_size + gid] + b[0 * cell_size + act_id]); in lstm_gates()
162 const T ci_local = tanh_op(gates[c_offset + gid] + b[c_offset + act_id]); in lstm_gates()
167 f_local = sigmoid_op(gates[f_offset + gid] + b[f_offset + act_id] + in lstm_gates()
170 f_local = sigmoid_op(gates[f_offset + gid] + b[f_offset + act_id] + in lstm_gates()
186 o_local = sigmoid_op(gates[3 * cell_size + gid] + in lstm_gates()
190 sigmoid_op(gates[3 * cell_size + gid] + b[3 * cell_size + act_id]); in lstm_gates()
237 typename TTypes<T>::Matrix co, typename TTypes<T>::Matrix gates, in LSTMBlockCellFpropWithCUDA() argument
258 w, typename gemm_compute_type<T>::type(0.f), gates); in LSTMBlockCellFpropWithCUDA()
[all …]
Dlstm_ops.cc55 typename TTypes<T>::Matrix co, typename TTypes<T>::Matrix gates, in LSTMBlockCellFpropWithEigen() argument
65 w, typename gemm_compute_type<T>::type(0.f), gates); in LSTMBlockCellFpropWithEigen()
68 gates.device(d) += b.reshape(b_shape).broadcast(broadcast_shape); in LSTMBlockCellFpropWithEigen()
77 (gates.slice(cell.gates_i_offsets(), cell.cell_extents()) + i_peep) in LSTMBlockCellFpropWithEigen()
81 gates.slice(cell.gates_i_offsets(), cell.cell_extents()).sigmoid(); in LSTMBlockCellFpropWithEigen()
86 gates.slice(cell.gates_c_offsets(gate_layout), cell.cell_extents()) in LSTMBlockCellFpropWithEigen()
93 (gates.slice(cell.gates_f_offsets(gate_layout), cell.cell_extents()) + in LSTMBlockCellFpropWithEigen()
98 (gates.slice(cell.gates_f_offsets(gate_layout), cell.cell_extents()) + in LSTMBlockCellFpropWithEigen()
118 (gates.slice(cell.gates_o_offsets(), cell.cell_extents()) + o_peep) in LSTMBlockCellFpropWithEigen()
122 gates.slice(cell.gates_o_offsets(), cell.cell_extents()).sigmoid(); in LSTMBlockCellFpropWithEigen()
[all …]
Dlstm_ops.h181 typename TTypes<T>::Matrix gates,
/external/u-boot/drivers/clk/meson/
Daxg.c27 static struct meson_gate gates[] = { variable
56 if (clk->id >= ARRAY_SIZE(gates)) in meson_set_gate()
59 gate = &gates[clk->id]; in meson_set_gate()
268 if (gates[id].reg != 0) { in meson_clk_get_rate_by_id()
Dgxbb.c84 static struct meson_gate gates[] = { variable
212 if (id >= ARRAY_SIZE(gates)) in meson_set_gate_by_id()
215 gate = &gates[id]; in meson_set_gate_by_id()
785 if (gates[id].reg != 0) { in meson_clk_get_rate_by_id()
Dg12a.c108 static struct meson_gate gates[NUM_CLKS] = { variable
156 if (id >= ARRAY_SIZE(gates)) in meson_set_gate_by_id()
159 gate = &gates[id]; in meson_set_gate_by_id()
841 if (gates[id].reg != 0) { in meson_clk_get_rate_by_id()
/external/u-boot/drivers/clk/mediatek/
Dclk-mtk.c386 const struct mtk_gate *gate = &priv->gates[clk->id]; in mtk_clk_gate_enable()
413 const struct mtk_gate *gate = &priv->gates[clk->id]; in mtk_clk_gate_disable()
440 const struct mtk_gate *gate = &priv->gates[clk->id]; in mtk_clk_gate_get_rate()
493 const struct mtk_gate *gates) in mtk_common_clk_gate_init() argument
502 priv->gates = gates; in mtk_common_clk_gate_init()
Dclk-mtk.h183 const struct mtk_gate *gates; member
194 const struct mtk_gate *gates);
/external/u-boot/drivers/clk/sunxi/
Dclk_a80.c65 .gates = a80_gates,
70 .gates = a80_mmc_gates,
Dclk_v3s.c46 .gates = v3s_gates,
Dclk_a10s.c47 .gates = a10s_gates,
Dclk_sunxi.c19 return &priv->desc->gates[id]; in priv_to_gate()
Dclk_a10.c60 .gates = a10_gates,
Dclk_a23.c63 .gates = a23_gates,
Dclk_a83t.c67 .gates = a83t_gates,
Dclk_a64.c70 .gates = a64_gates,
Dclk_h6.c78 .gates = h6_gates,
Dclk_a31.c82 .gates = a31_gates,
Dclk_h3.c83 .gates = h3_gates,
Dclk_r40.c90 .gates = r40_gates,
/external/u-boot/doc/device-tree-bindings/clock/
Drockchip.txt13 structure a matter of taste, as either all gates can be put into
15 the 10 individual gates containing 16 clocks each.
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dccu.h64 const struct ccu_clk_gate *gates; member
/external/u-boot/board/tbs/tbs2910/
Dtbs2910.cfg15 /* set the default clock gates to save power */
/external/u-boot/arch/arm/dts/
Dsun8i-a23-a33.dtsi593 compatible = "allwinner,sun8i-a23-apb0-gates-clk";
/external/brotli/tests/testdata/
Dplrabn12.txt241 Back to the gates of Heaven: the sulphurous hail,
396 His swift pursuers from Heaven-gates discern
831 Attended. All access was thronged; the gates
1310 Ninefold; and gates of burning adamant,
1505 Puts on swift wings, and toward the gates of Hell
1519 And thrice threefold the gates; three folds were brass,
1522 Yet unconsumed. Before the gates there sat
1558 To yonder gates? Through them I mean to pass,
1650 These gates for ever shut, which none can pass
1727 These adamantine gates; against all force
[all …]

12