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Searched refs:gclk_rate (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/drivers/clk/rockchip/
Dclk_rk3288.c387 static ulong rockchip_i2s_get_clk(struct rk3288_cru *cru, uint gclk_rate) in rockchip_i2s_get_clk() argument
397 rate = (unsigned long long)gclk_rate * n; in rockchip_i2s_get_clk()
403 static ulong rockchip_i2s_set_clk(struct rk3288_cru *cru, uint gclk_rate, in rockchip_i2s_set_clk() argument
410 v = rockchip_clk_gcd(gclk_rate, freq); in rockchip_i2s_set_clk()
411 n = gclk_rate / v; in rockchip_i2s_set_clk()
413 assert(freq == gclk_rate / n * d); in rockchip_i2s_set_clk()
417 return rockchip_i2s_get_clk(cru, gclk_rate); in rockchip_i2s_set_clk()
570 static ulong rockchip_mmc_get_clk(struct rk3288_cru *cru, uint gclk_rate, in rockchip_mmc_get_clk() argument
600 src_rate = mux == EMMC_PLL_SELECT_24MHZ ? OSC_HZ : gclk_rate; in rockchip_mmc_get_clk()
604 static ulong rockchip_mmc_set_clk(struct rk3288_cru *cru, uint gclk_rate, in rockchip_mmc_set_clk() argument
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Dclk_rk3188.c258 static ulong rockchip_mmc_get_clk(struct rk3188_cru *cru, uint gclk_rate, in rockchip_mmc_get_clk() argument
284 return DIV_TO_RATE(gclk_rate, div) / 2; in rockchip_mmc_get_clk()
287 static ulong rockchip_mmc_set_clk(struct rk3188_cru *cru, uint gclk_rate, in rockchip_mmc_set_clk() argument
292 debug("%s: gclk_rate=%u\n", __func__, gclk_rate); in rockchip_mmc_set_clk()
294 src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq) - 1; in rockchip_mmc_set_clk()
320 return rockchip_mmc_get_clk(cru, gclk_rate, periph); in rockchip_mmc_set_clk()
323 static ulong rockchip_spi_get_clk(struct rk3188_cru *cru, uint gclk_rate, in rockchip_spi_get_clk() argument
342 return DIV_TO_RATE(gclk_rate, div); in rockchip_spi_get_clk()
345 static ulong rockchip_spi_set_clk(struct rk3188_cru *cru, uint gclk_rate, in rockchip_spi_set_clk() argument
348 int src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1; in rockchip_spi_set_clk()
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Dclk_rk322x.c352 ulong rate, gclk_rate; in rk322x_clk_get_rate() local
354 gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL); in rk322x_clk_get_rate()
363 rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id); in rk322x_clk_get_rate()
375 ulong new_rate, gclk_rate; in rk322x_clk_set_rate() local
377 gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL); in rk322x_clk_set_rate()
383 new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate, in rk322x_clk_set_rate()
Dclk_rk3036.c294 ulong new_rate, gclk_rate; in rk3036_clk_set_rate() local
296 gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL); in rk3036_clk_set_rate()
302 new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate, in rk3036_clk_set_rate()
Dclk_rk3128.c508 ulong new_rate, gclk_rate; in rk3128_clk_set_rate() local
510 gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL); in rk3128_clk_set_rate()
521 new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate, in rk3128_clk_set_rate()