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Searched refs:getSrc (Results 1 – 25 of 64) sorted by relevance

123

/external/swiftshader/third_party/subzero/src/
DIceInstMIPS32.cpp165 auto *Src0 = llvm::cast<Constant>(getSrc(0)); in emit()
366 Inst->getSrc(0)->emit(Func); in emitUnaryopGPR()
383 Inst->getSrc(0)->emit(Func); in emitUnaryopGPRTLoHi()
395 Inst->getSrc(0)->emit(Func); in emitThreeAddr()
397 Inst->getSrc(1)->emit(Func); in emitThreeAddr()
409 Inst->getSrc(0)->emit(Func); in emitTwoAddr()
419 Inst->getSrc(0)->emit(Func); in emitThreeAddrLoHi()
421 Inst->getSrc(1)->emit(Func); in emitThreeAddrLoHi()
428 auto *RA = llvm::cast<Variable>(getSrc(0)); in emit()
445 Asm->bcc(Predicate, getSrc(0), getSrc(1), in emitIAS()
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DIceInstARM32.cpp167 Type SrcTy = Instr->getSrc(0)->getType(); in emitUnaryopGPR()
174 Instr->getSrc(0)->emit(Func); in emitUnaryopGPR()
181 Type SrcTy = Instr->getSrc(0)->getType(); in emitUnaryopFP()
197 Instr->getSrc(0)->emit(Func); in emitUnaryopFP()
207 assert(Dest == Instr->getSrc(0)); in emitTwoAddr()
211 Instr->getSrc(1)->emit(Func); in emitTwoAddr()
225 Instr->getSrc(0)->emit(Func); in emitThreeAddr()
227 Instr->getSrc(1)->emit(Func); in emitThreeAddr()
240 Instr->getSrc(0)->emit(Func); in emitThreeAddrFP()
242 Instr->getSrc(1)->emit(Func); in emitThreeAddrFP()
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DIceInstX86BaseImpl.h569 const Operand *Src = this->getSrc(0); in emit()
694 Dest = getSrc(0); in emitTwoAddress()
695 assert(Dest == getSrc(0)); in emitTwoAddress()
696 Operand *Src1 = getSrc(1); in emitTwoAddress()
1023 Str << " = movmsk." << this->getSrc(0)->getType() << " "; in dump()
1033 Type SrcTy = this->getSrc(0)->getType(); in emit()
1050 this->getSrc(0)->emit(Func); in emit()
1060 const Variable *Src = llvm::cast<Variable>(this->getSrc(0)); in emitIAS()
1082 Type Ty = this->getSrc(0)->getType(); in emit()
1086 this->getSrc(0)->emit(Func); in emit()
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DIceInst.cpp182 Operand *Src = OrigInst->getSrc(I); in spliceLivenessInfo()
187 (RightMask << (Index + getSrc(I)->getNumVars())); in spliceLivenessInfo()
190 Index += getSrc(I)->getNumVars(); in spliceLivenessInfo()
309 bool InstAssign::isVarAssign() const { return llvm::isa<Variable>(getSrc(0)); } in isVarAssign()
417 return getSrc(I); in getOperandForTarget()
445 if (auto *Var = llvm::dyn_cast<Variable>(getSrc(I))) { in livenessPhiOperand()
498 return llvm::dyn_cast<Variable>(getSrc(2)); in getRmwBeacon()
705 getSrc(I)->dump(Func); in dumpSources()
716 getSrc(I)->emit(Func); in emitSources()
807 Str << " = " << getCastName(getCastKind()) << " " << getSrc(0)->getType() in dump()
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DIceInstMIPS32.h644 getSrc(0)->emit(Func); in emit()
661 getSrc(0)->dump(Func); in dump()
695 const Type Ty = getSrc(0)->getType(); in emit()
731 getSrc(0)->emit(Func); in emit()
734 getSrc(1)->emit(Func); in emit()
746 dumpOpcode(Str, Opcode, getSrc(0)->getType()); in dump()
748 getSrc(0)->dump(Func); in dump()
751 getSrc(1)->dump(Func); in dump()
886 Operand *getCallTarget() const { return getSrc(0); } in getCallTarget()
914 getSrc(0)->emit(Func); in emit()
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DIceCfg.cpp566 Result ^= Instr->getSrc(i)->hashValue(); in localCSE()
591 if (!srcEq(InstrA->getSrc(i), InstrB->getSrc(i))) in localCSE()
640 auto *Opnd = Instr.getSrc(i); in localCSE()
659 auto *Opnd = Instr.getSrc(i); in localCSE()
732 if (auto *Var = llvm::dyn_cast<Variable>(Inst.getSrc(i))) { in findLoopInvariantInstructions()
858 if (auto *Const = llvm::dyn_cast<Constant>(Current->getSrc(i))) { in floatConstantCSE()
893 if (auto *Const = llvm::dyn_cast<Constant>(InstUse->getSrc(i))) { in floatConstantCSE()
1125 auto *Src0Var = llvm::dyn_cast<Variable>(Arith->getSrc(0)); in rematerializeArithmetic()
1129 auto *Src1Imm = llvm::dyn_cast<ConstantInteger32>(Arith->getSrc(1)); in rematerializeArithmetic()
1146 auto *Src0Var = llvm::dyn_cast<Variable>(Instr->getSrc(0)); in rematerializeAssign()
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DIceInst.h107 Operand *getSrc(SizeT I) const { in getSrc() function
295 Operand *getSizeInBytes() const { return getSrc(0); } in getSizeInBytes()
394 return getSrc(0); in getCondition()
441 Operand *getCallTarget() const { return getSrc(0); } in getCallTarget()
442 Operand *getArg(SizeT I) const { return getSrc(I + 1); } in getArg()
659 Operand *getSourceAddress() const { return getSrc(0); } in getSourceAddress()
716 return getSrc(0); in getRetValue()
739 Operand *getCondition() const { return getSrc(0); } in getCondition()
740 Operand *getTrueOperand() const { return getSrc(1); } in getTrueOperand()
741 Operand *getFalseOperand() const { return getSrc(2); } in getFalseOperand()
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DIcePhiLoweringImpl.h46 Operand *Src = Phi->getSrc(I); in prelowerPhis32Bit()
62 Operand *Src = Phi->getSrc(I); in prelowerPhis32Bit()
DIceTargetLoweringX86BaseImpl.h182 if (Traits::Is64Bit || Instr->getSrc(0)->getType() != IceType_i64)
189 if (Traits::Is64Bit || Arith->getSrc(0)->getType() != IceType_i64) {
387 if (llvm::isa<typename Traits::X86OperandMem>(PInst->getSrc(I))) {
769 Operand *ArithSrcFromLoad = Arith->getSrc(0);
770 Operand *ArithSrcOther = Arith->getSrc(1);
868 Operand *Src0 = Arith->getSrc(0);
869 Operand *Src1 = Arith->getSrc(1);
875 Operand *Src0 = Icmp->getSrc(0);
876 Operand *Src1 = Icmp->getSrc(1);
882 Operand *Src0 = Fcmp->getSrc(0);
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_lowering_gv100.cpp38 i->sType, bld.mkImm(0), i->getSrc(2))->ftz = i->ftz; in handleCMP()
39 bld.mkOp3(OP_SELP, TYPE_U32, i->getDef(0), i->getSrc(0), i->getSrc(1), pred); in handleCMP()
53 if (i->getSrc(s)->reg.size == 8) { in handleIADD64()
54 bld.mkSplit(src[s], 4, i->getSrc(s)); in handleIADD64()
56 src[s][0] = i->getSrc(s); in handleIADD64()
76 (!i->getSrc(2)->asImm() || i->getSrc(2)->asImm()->reg.data.u32)) { in handleIMAD_HIGH()
79 bld.mkMov(src2s[1], i->getSrc(2)); in handleIMAD_HIGH()
86 i->getSrc(0), i->getSrc(1), src2); in handleIMAD_HIGH()
102 i->sType, i->getSrc(0), i->getSrc(1)); in handleIMNMX()
103 bld.mkOp3(OP_SELP, i->dType, i->getDef(0), i->getSrc(0), i->getSrc(1), pred); in handleIMNMX()
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Dnv50_ir_peephole.cpp53 if (!getDef(0)->equals(getSrc(0))) in isNop()
56 if (!def(0).rep()->equals(getSrc(1))) in isNop()
103 if (mov->op != OP_MOV || mov->fixed || !mov->getSrc(0)->asLValue()) in visit()
109 si = mov->getSrc(0)->getInsn(); in visit()
112 mov->def(0).replace(mov->getSrc(0), false); in visit()
138 si = i->getSrc(0)->getInsn(); in visit()
139 if (si->op != OP_SPLIT || si != i->getSrc(1)->getInsn()) in visit()
141 i->def(0).replace(si->getSrc(0), false); in visit()
212 Instruction *i0 = insn->getSrc(0)->getInsn(); in checkSwapSrc01()
213 Instruction *i1 = insn->getSrc(1)->getInsn(); in checkSwapSrc01()
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Dnv50_ir_lowering_helper.cpp70 bld.mkOp2(OP_SUB, dTy, neg, bld.mkImm((uint64_t)0), insn->getSrc(0)); in handleABS()
72 bld.mkSplit(srcComp, 4, insn->getSrc(0)); in handleABS()
96 bld.mkSplit(src, 4, insn->getSrc(0)); in handleCVT()
101 bld.mkOp2(OP_SHR, TYPE_S32, tmp, insn->getSrc(0), bld.loadImm(bld.getSSA(), 31)); in handleCVT()
127 bld.mkSplit(src0, 4, insn->getSrc(0)); in handleMAXMIN()
128 bld.mkSplit(src1, 4, insn->getSrc(1)); in handleMAXMIN()
156 Storage &reg = insn->getSrc(0)->reg; in handleMOV()
185 insn->setSrc(1, insn->getSrc(0)); in handleNEG()
200 …Value *tmp = bld.mkOp2v(OP_MAX, dTy, bld.getSSA(8), insn->getSrc(0), bld.loadImm(bld.getSSA(8), 0.… in handleSAT()
224 bld.mkSplit(src0, 4, insn->getSrc(0)); in handleSLCT()
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Dnv50_ir_from_nir.cpp96 Value* getSrc(nir_alu_src *, uint8_t component = 0);
97 Value* getSrc(nir_register *, uint8_t);
98 Value* getSrc(nir_src *, uint8_t, bool indirect = false);
99 Value* getSrc(nir_ssa_def *, uint8_t);
769 Converter::getSrc(nir_alu_src *src, uint8_t component) in getSrc() function in __anon87abe68c0111::Converter
775 return getSrc(&src->src, src->swizzle[component]); in getSrc()
779 Converter::getSrc(nir_register *reg, uint8_t idx) in getSrc() function in __anon87abe68c0111::Converter
788 Converter::getSrc(nir_src *src, uint8_t idx, bool indirect) in getSrc() function in __anon87abe68c0111::Converter
791 return getSrc(src->ssa, idx); in getSrc()
795 return getSrc(src->reg.indirect, idx); in getSrc()
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Dnv50_ir_lowering_nv50.cpp80 bld->mkOp1(OP_ABS, mul->sType, s[0], mul->getSrc(0)); in expandIntegerMUL()
81 bld->mkOp1(OP_ABS, mul->sType, s[1], mul->getSrc(1)); in expandIntegerMUL()
84 s[0] = mul->getSrc(0); in expandIntegerMUL()
85 s[1] = mul->getSrc(1); in expandIntegerMUL()
153 bld->mkOp2(OP_XOR, fTy, NULL, mul->getSrc(0), mul->getSrc(1)) in expandIntegerMUL()
237 (*it)->getSrc(1)->defs.front()->getInsn()->setDef(0, (*it)->getSrc(0)); in visit()
249 ImmediateValue *imm = i->getSrc(s)->asImm(); in replaceZero()
364 if (st->src(0).isIndirect(0) || st->getSrc(1)->refCount() != 1) in propagateWriteToOutput()
368 Instruction *di = st->getSrc(1)->defs.front()->getInsn(); in propagateWriteToOutput()
430 Value *a = i->getSrc(s); in handleAddrDef()
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Dnv50_ir_lowering_gm107.cpp58 bld.mkOp2(OP_ADD , TYPE_U32, src0, i->getSrc(0), i->getSrc(1)); in handlePFETCH()
60 bld.mkOp1(OP_MOV , TYPE_U32, src0, i->getSrc(0)); in handlePFETCH()
127 bld.mkOp3(OP_SHFL, TYPE_F32, arr, i->getSrc(0), lane, quad); in handleManualTXD()
129 bld.mkOp3(OP_SHFL, TYPE_F32, shadow, i->getSrc(array + dim + indirect), lane, quad); in handleManualTXD()
134 bld.mkOp3(OP_SHFL, TYPE_F32, crd[c], i->getSrc(c + array), lane, quad); in handleManualTXD()
224 shfl = bld.mkOp3(OP_SHFL, TYPE_F32, bld.getScratch(), insn->getSrc(0), in handleDFDX()
230 insn->setSrc(1, insn->getSrc(0)); in handleDFDX()
244 if (i->getSrc(1)) in handlePFETCH()
245 bld.mkOp2(OP_ADD , TYPE_U32, tmp2, i->getSrc(0), i->getSrc(1)); in handlePFETCH()
247 bld.mkOp1(OP_MOV , TYPE_U32, tmp2, i->getSrc(0)); in handlePFETCH()
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Dnv50_ir_lowering_nvc0.cpp53 Instruction *ld = i->getSrc(s)->getInsn(); in handleDIV()
57 bld.mkMovToReg(s, i->getSrc(s)); in handleDIV()
59 assert(ld->getSrc(0) != NULL); in handleDIV()
60 bld.mkMovToReg(s, ld->getSrc(0)); in handleDIV()
129 bld.mkSplit(src, 4, i->getSrc(0)); in handleRCPRSQ()
207 Value *shift = lo->getSrc(1); in handleShift()
214 bld.mkSplit(src, 4, lo->getSrc(0)); in handleShift()
303 bld.mkSplit(src0, 4, cmp->getSrc(0)); in handleSET()
304 bld.mkSplit(src1, 4, cmp->getSrc(1)); in handleSET()
712 ImmediateValue *imm = i->getSrc(s)->asImm(); in replaceZero()
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Dnv50_ir_from_tgsi.cpp193 SrcRegister getSrc(unsigned int s) const in getSrc() function in tgsi::Instruction
1457 insn.getSrc(0).getFile() == TGSI_FILE_INPUT; in isEdgeFlagPassthrough()
1557 info_out->io.edgeFlagIn = insn.getSrc(0).getIndex(0); in scanInstruction()
1572 insn.getSrc(0).getFile() != TGSI_FILE_MEMORY || in scanInstruction()
1573 memoryFiles[insn.getSrc(0).getIndex(0)].mem_type == in scanInstruction()
1598 scanInstructionSrc(insn, insn.getSrc(s), insn.srcMask(s)); in scanInstruction()
1612 switch (getSrc(s).getFile()) { in getTexture()
1619 r = getSrc(s).getIndex(0); in getTexture()
1836 Modifier m = tgsi.getSrc(s).getMod(c); in applySrcMod()
1853 const int index = tgsi.getSrc(s).getIndex(1); in getVertexBase()
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Dnv50_ir_ra.cpp456 phis.insert(std::make_pair(std::make_pair(phi, pb), phi->getSrc(j))); in splitEdges()
519 mov->setSrc(0, phi->getSrc(j)); in visit()
548 LValue *tmp = new_LValue(func, cal->getSrc(s)->asLValue()); in visit()
554 mov->setSrc(0, cal->getSrc(s)); in visit()
648 if (i->getSrc(s)->asLValue()) in buildLiveSets()
649 bb->liveSet.set(i->getSrc(s)->id); in buildLiveSets()
703 if (i->getSrc(s)->getUniqueInsn()->bb == bb) // XXX: reachableBy ? in visit()
704 bb->liveSet.set(i->getSrc(s)->id); in visit()
706 bb->liveSet.clr(i->getSrc(s)->id); in visit()
726 if (!i->getSrc(s)->asLValue()) in visit()
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Dnv50_ir_inlines.h246 return srcs[s].isIndirect(dim) ? getSrc(srcs[s].indirect[dim]) : NULL; in getIndirect()
251 return (predSrc >= 0) ? getSrc(predSrc) : NULL; in getPredicate()
276 return tex.rIndirectSrc >= 0 ? getSrc(tex.rIndirectSrc) : NULL; in getIndirectR()
281 return tex.rIndirectSrc >= 0 ? getSrc(tex.rIndirectSrc) : NULL; in getIndirectS()
331 pol.set(obj->getSrc(i), obj->getSrc(i)); in cloneForward()
Dnv50_ir_build_util.cpp202 insn->getSrc(0)->reg.data.id = id; in mkMovFromReg()
604 if (lo->getSrc(s)->reg.size < 8) { in split64BitOpPostRA()
606 hi->setSrc(s, lo->getSrc(s)); in split64BitOpPostRA()
610 if (lo->getSrc(s)->refCount() > 1) in split64BitOpPostRA()
611 lo->setSrc(s, cloneShallow(fn, lo->getSrc(s))); in split64BitOpPostRA()
612 lo->getSrc(s)->reg.size /= 2; in split64BitOpPostRA()
613 hi->setSrc(s, cloneShallow(fn, lo->getSrc(s))); in split64BitOpPostRA()
617 hi->getSrc(s)->reg.data.u64 >>= 32; in split64BitOpPostRA()
623 hi->getSrc(s)->reg.data.offset += 4; in split64BitOpPostRA()
627 hi->getSrc(s)->reg.data.id++; in split64BitOpPostRA()
Dnv50_ir_emit_nv50.cpp255 assert(i->getSrc(s)->reg.file == FILE_FLAGS); in emitFlagsRd()
415 code[1] |= (i->getSrc(1)->reg.fileIndex << 22); in setSrcFileBits()
424 code[1] |= (i->getSrc(1)->reg.fileIndex << 22); in setSrcFileBits()
428 code[1] |= (i->getSrc(2)->reg.fileIndex << 22); in setSrcFileBits()
432 code[1] |= 0x00200000 | (i->getSrc(2)->reg.fileIndex << 22); in setSrcFileBits()
457 assert(i->getSrc(0)->reg.size == 4); in setSrcFileBits()
624 ASSERTED int32_t offset = i->getSrc(0)->reg.data.offset; in emitLOAD()
656 code[1] = 0x20000000 | (i->getSrc(0)->reg.fileIndex << 22); in emitLOAD()
666 code[0] = 0xd0000001 | (i->getSrc(0)->reg.fileIndex << 16); in emitLOAD()
693 DataFile f = i->getSrc(0)->reg.file; in emitSTORE()
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Dnv50_ir_ssa.cpp247 if (i->getSrc(s)->asLValue() && !assigned.test(i->getSrc(s)->id)) in buildLiveSetsPreSSA()
248 usedBeforeAssigned.set(i->getSrc(s)->id); in buildLiveSetsPreSSA()
480 lval = stmt->getSrc(s)->asLValue(); in search()
487 lval = mkUndefined(stmt->getSrc(s)); in search()
517 lval = getStackTop(phi->getSrc(p)); in search()
519 lval = mkUndefined(phi->getSrc(p)); in search()
Dnv50_ir_emit_gk110.cpp334 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32; in setShortImmediate()
335 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64; in setShortImmediate()
360 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32; in setImmediate32()
363 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType); in setImmediate32()
499 assert(i->getDef(0)->reg.data.id == i->getSrc(2)->reg.data.id); in emitFMAD()
1262 if (i->getDef(0)->interfers(i->next->getSrc(0))) in isNextIndependentTex()
1264 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1)); in isNextIndependentTex()
1459 ImmediateValue *imm = i->getSrc(0)->asImm(); in emitBAR()
1469 ImmediateValue *imm = i->getSrc(0)->asImm(); in emitBAR()
1592 imm = i->getSrc(1)->asImm(); in emitSHFL()
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Dnv50_ir_target_nvc0.cpp344 if (sf == FILE_IMMEDIATE && ld->getSrc(0)->reg.data.u64 == 0) in insnCanLoad()
380 if (i->getSrc(k)->reg.data.u64 != 0) in insnCanLoad()
392 (ld->getSrc(0)->reg.data.offset & 0x3) in insnCanLoad()
398 Storage &reg = ld->getSrc(0)->asImm()->reg; in insnCanLoad()
547 if (insn->getSrc(1)->asImm() && in isSatSupported()
548 insn->getSrc(1)->reg.data.u32 & 0xfff) in isSatSupported()
/external/swiftshader/src/Reactor/
DOptimizer.cpp182 if(use->getSrc(i) == loadData) in eliminateUnitializedLoads()
468 if(instruction.getSrc(i) == instruction.getSrc(unique)) in analyzeUses()
476 Ice::Operand *src = instruction.getSrc(i); in analyzeUses()
501 if(use->getSrc(i) == oldValue) in replace()
527 Ice::Operand *src = instruction->getSrc(i); in deleteInstruction()
637 return storeSubVector->getSrc(2); in storeAddress()
654 return loadSubVector->getSrc(1); in loadAddress()
671 return storeSubVector->getSrc(1); in storeData()
688 return llvm::cast<Ice::ConstantInteger32>(storeSubVector->getSrc(3))->getValue(); in storeSize()
717 return storeSubVector->getSrc(1)->getType() == loadSubVector->getDest()->getType() && in loadTypeMatchesStore()
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