/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsExpandPseudo.cpp | 92 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwapSubword() 93 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwapSubword() 94 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwapSubword() 95 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwapSubword() 97 LL = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicCmpSwapSubword() 99 SC = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicCmpSwapSubword() 218 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwap() 219 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwap() 220 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwap() 221 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwap() [all …]
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D | MipsBranchExpansion.cpp | 388 STI->hasMips32r6() in expandToLongBranch() 459 if (STI->hasMips32r6()) { in expandToLongBranch() 483 (STI->hasMips32r6() && !STI->useIndirectJumpsHazard())) in expandToLongBranch() 488 if (STI->hasMips32r6() && !STI->useIndirectJumpsHazard()) { in expandToLongBranch() 498 ? (STI->hasMips32r6() ? Mips::JR_HB_R6 : Mips::JR_HB) in expandToLongBranch() 582 if (STI->hasMips32r6()) { in expandToLongBranch() 610 ? (STI->hasMips32r6() ? Mips::JR_HB64_R6 : Mips::JR_HB64) in expandToLongBranch() 630 if (STI->hasMips32r6()) in expandToLongBranch() 666 if (!STI->hasMips32r6() || STI->inMicroMipsMode()) in handleForbiddenSlot() 709 : (STI->hasMips32r6() ? 1 : 2); in handlePossibleLongBranch()
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D | MipsSubtarget.cpp | 132 if (hasMips32r6()) { in MipsSubtarget() 189 if (!hasMips32r6() && hasCRC() && !CRCWarningPrinted) { in MipsSubtarget() 194 if (!hasMips32r6() && hasGINV() && !GINVWarningPrinted) { in MipsSubtarget()
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D | MipsSubtarget.h | 257 bool hasMips32r6() const { in hasMips32r6() function 299 bool inMicroMips32r6Mode() const { return InMicroMipsMode && hasMips32r6(); } in inMicroMips32r6Mode() 355 bool systemSupportsUnalignedAccess() const { return hasMips32r6(); } in systemSupportsUnalignedAccess()
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D | MipsSERegisterInfo.cpp | 115 if (Subtarget.hasMips32r6()) in getLoadStoreOffsetSizeInBits()
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D | MipsInstrInfo.cpp | 464 if (Subtarget.hasMips32r6() && (I->getNumOperands() > 1) && in getEquivalentCompactForm() 473 if (Subtarget.hasMips32r6() || canUseShortMicroMipsCTI) { in getEquivalentCompactForm()
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D | MipsRegisterInfo.cpp | 102 return Subtarget.hasMips32r6() ? CSR_Interrupt_32R6_SaveList in getCalleeSavedRegs()
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D | MipsDelaySlotFiller.cpp | 613 !(InMicroMipsMode && STI.hasMips32r6())) { in runOnMachineBasicBlock() 662 (STI.hasMips32r6() && MipsCompactBranchPolicy != CB_Never)) && in runOnMachineBasicBlock()
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D | MipsISelLowering.cpp | 312 if (Subtarget.hasMips32r6()) in MipsTargetLowering() 544 !Subtarget.hasMips32r6() && !Subtarget.inMips16Mode() && in createFastISel() 1055 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performSUBCombine() 1070 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performADDCombine() 1893 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerBRCOND() 1913 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSELECT() 1925 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSETCC()
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D | MicroMipsSizeReduction.cpp | 685 Subtarget->hasMips32r6()) in runOnMachineFunction()
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/external/llvm/lib/Target/Mips/ |
D | MipsSubtarget.h | 208 bool hasMips32r6() const { in hasMips32r6() function 246 bool inMicroMips32r6Mode() const { return InMicroMipsMode && hasMips32r6(); } in inMicroMips32r6Mode() 291 bool systemSupportsUnalignedAccess() const { return hasMips32r6(); } in systemSupportsUnalignedAccess()
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D | MipsHazardSchedule.cpp | 108 if (!STI->hasMips32r6() || STI->inMicroMipsMode()) in runOnMachineFunction()
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D | MipsInstrInfo.cpp | 288 if (Subtarget.hasMips32r6() && (I->getNumOperands() > 1) && in getEquivalentCompactForm() 297 if (Subtarget.hasMips32r6() || canUseShortMicroMipsCTI) { in getEquivalentCompactForm()
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D | MipsSubtarget.cpp | 108 if (hasMips32r6()) { in MipsSubtarget()
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D | MipsLongBranch.cpp | 279 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR; in expandToLongBranch() 340 if (Subtarget.hasMips32r6()) in expandToLongBranch()
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D | MipsRegisterInfo.cpp | 105 return Subtarget.hasMips32r6() ? CSR_Interrupt_32R6_SaveList in getCalleeSavedRegs()
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D | MipsDelaySlotFiller.cpp | 571 if (InMicroMipsMode && STI.hasMips32r6()) { in runOnMachineBasicBlock() 625 (STI.hasMips32r6() && MipsCompactBranchPolicy != CB_Never)) && in runOnMachineBasicBlock()
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D | MipsISelLowering.cpp | 234 if (Subtarget.hasMips32r6()) in MipsTargetLowering() 1121 LL = Subtarget.hasMips32r6() in emitAtomicBinary() 1124 SC = Subtarget.hasMips32r6() in emitAtomicBinary() 1268 LL = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in emitAtomicBinaryPartword() 1270 SC = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in emitAtomicBinaryPartword() 1409 LL = Subtarget.hasMips32r6() in emitAtomicCmpSwap() 1412 SC = Subtarget.hasMips32r6() in emitAtomicCmpSwap() 1523 LL = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in emitAtomicCmpSwapPartword() 1525 SC = Subtarget.hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in emitAtomicCmpSwapPartword() 1704 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerBRCOND() [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenDAGISel.inc | 69 /* 24*/ OPC_CheckPatternPredicate, 0, // (Subtarget->hasMips32r6()) && (Subtarget->in… 110 …arget->isFP64bit()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarg… 117 …ubtarget->isFP64bit()) && (!Subtarget->useSoftFloat()) && (!Subtarget->hasMips32r6()) && (!Subtarg… 157 …arget->isTargetNaCl()) && (!Subtarget->useSoftFloat()) && (!Subtarget->hasMips32r6()) && (!Subtarg… 164 …9, // (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat()) && (!Subtarget->hasMips32r6()) 225 …StandardEncoding()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarg… 233 …StandardEncoding()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarg… 241 …arget->hasCnMips()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarg… 328 /* 494*/ OPC_CheckPatternPredicate, 15, // (Subtarget->hasMips32r6()) && (Subtarget->i… 405 /* 633*/ OPC_CheckPatternPredicate, 21, // (Subtarget->hasMips32r6()) && (Subtarget->inM… [all …]
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D | MipsGenFastISel.inc | 70 …if ((Subtarget->hasMips32r6()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat())) { 94 …if ((Subtarget->hasMips32r6()) && (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat())) { 133 if ((Subtarget->hasMips32r6()) && (Subtarget->inMicroMipsMode())) { 136 if ((Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6())) { 139 …if ((Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->inMicroMipsMo… 142 …if ((Subtarget->hasMips32r6()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->useIndirectJu… 145 …et->inMicroMipsMode()) && (!Subtarget->inMips16Mode()) && (!Subtarget->hasMips32r6()) && (!Subtarg… 148 …et->inMicroMipsMode()) && (!Subtarget->inMips16Mode()) && (!Subtarget->hasMips32r6()) && (!Subtarg… 163 …et->inMicroMipsMode()) && (!Subtarget->inMips16Mode()) && (!Subtarget->hasMips32r6()) && (!Subtarg… 166 …et->inMicroMipsMode()) && (!Subtarget->inMips16Mode()) && (!Subtarget->hasMips32r6()) && (!Subtarg… [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsABIFlagsSection.h | 99 if (P.hasMips32r6()) in setISALevelAndRevisionFromPredicates()
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsABIFlagsSection.h | 101 if (P.hasMips32r6()) in setISALevelAndRevisionFromPredicates()
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/external/llvm/lib/Target/Mips/Disassembler/ |
D | MipsDisassembler.cpp | 45 bool hasMips32r6() const { in hasMips32r6() function in __anonc321f61f0111::MipsDisassembler 975 if (hasMips32r6()) { in getInstruction() 1001 if (hasMips32r6()) { in getInstruction() 1021 if (hasMips32r6() && isFP64()) { in getInstruction() 1053 if (hasMips32r6() && isGP64()) { in getInstruction() 1063 if (hasMips32r6() && isPTR64()) { in getInstruction() 1073 if (hasMips32r6()) { in getInstruction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/ |
D | MipsDisassembler.cpp | 54 bool hasMips32r6() const { in hasMips32r6() function in __anonc18bfcb70111::MipsDisassembler 1227 if (hasMips32r6()) { in getInstruction() 1254 if (hasMips32r6()) { in getInstruction() 1312 if (hasMips32r6() && isGP64()) { in getInstruction() 1321 if (hasMips32r6() && isPTR64()) { in getInstruction() 1330 if (hasMips32r6()) { in getInstruction()
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 506 bool hasMips32r6() const { in hasMips32r6() function in __anon9086a1bf0211::MipsAsmParser 1593 if (hasMips32r6() && Inst.getOpcode() == Mips::SSNOP) { in processInstruction() 2100 JalrInst.setOpcode(hasMips32r6() ? Mips::JALRC16_MMR6 : Mips::JALR16_MM); in expandJalWithRegs() 2561 Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM); in expandUncondBranchMMPseudo() 2744 if (inMicroMipsMode() && hasMips32r6()) in expandLoadStoreMultiple() 3173 if (hasMips32r6() || hasMips64r6()) { in expandUlh() 3252 if (hasMips32r6() || hasMips64r6()) { in expandUlw()
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