| /external/u-boot/board/gdsys/common/ |
| D | mclink.c | 65 u16 int_status; in mclink_send() local
70 FPGA_GET_REG(0, mc_int, &int_status); in mclink_send()
71 FPGA_SET_REG(0, mc_int, int_status); in mclink_send()
80 FPGA_GET_REG(0, mc_int, &int_status); in mclink_send()
81 while (!(int_status & MCINT_RX_PACKET_RECEIVED_EV)) { in mclink_send()
85 FPGA_GET_REG(0, mc_int, &int_status); in mclink_send()
101 u16 int_status; in mclink_receive() local
112 FPGA_GET_REG(0, mc_int, &int_status); in mclink_receive()
113 while (!(int_status & MCINT_RX_CONTENT_AVAILABLE)) { in mclink_receive()
117 FPGA_GET_REG(0, mc_int, &int_status); in mclink_receive()
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| /external/u-boot/drivers/i2c/ |
| D | i2c-cdns.c | 88 int int_status; in cdns_i2c_debug_status() local
90 int_status = readl(&cdns_i2c->interrupt_status); in cdns_i2c_debug_status()
93 if (int_status || status) { in cdns_i2c_debug_status()
95 if (int_status & CDNS_I2C_INTERRUPT_COMP) in cdns_i2c_debug_status()
97 if (int_status & CDNS_I2C_INTERRUPT_DATA) in cdns_i2c_debug_status()
99 if (int_status & CDNS_I2C_INTERRUPT_NACK) in cdns_i2c_debug_status()
101 if (int_status & CDNS_I2C_INTERRUPT_TO) in cdns_i2c_debug_status()
103 if (int_status & CDNS_I2C_INTERRUPT_SLVRDY) in cdns_i2c_debug_status()
105 if (int_status & CDNS_I2C_INTERRUPT_RXOVF) in cdns_i2c_debug_status()
107 if (int_status & CDNS_I2C_INTERRUPT_TXOVF) in cdns_i2c_debug_status()
[all …]
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| D | tegra_i2c.c | 211 int int_status; in wait_for_transfer_complete() local
215 int_status = readl(&control->int_status); in wait_for_transfer_complete()
216 if (int_status & I2C_INT_NO_ACK_MASK) in wait_for_transfer_complete()
217 return -int_status; in wait_for_transfer_complete()
218 if (int_status & I2C_INT_ARBITRATION_LOST_MASK) in wait_for_transfer_complete()
219 return -int_status; in wait_for_transfer_complete()
220 if (int_status & I2C_INT_XFER_COMPLETE_MASK) in wait_for_transfer_complete()
234 u32 int_status; in send_recv_packets() local
243 int_status = readl(&control->int_status); in send_recv_packets()
244 writel(int_status, &control->int_status); in send_recv_packets()
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| D | exynos_hs_i2c.c | 107 u32 int_status = readl(&i2c->usi_int_stat); in hsi2c_wait_for_trx() local
109 if (int_status & HSI2C_INT_I2C_EN) { in hsi2c_wait_for_trx()
113 writel(int_status, &i2c->usi_int_stat); in hsi2c_wait_for_trx()
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| /external/u-boot/lib/efi_loader/ |
| D | efi_net.c | 82 this->int_status = 0; in efi_net_start()
172 this->int_status = 0; in efi_net_initialize()
255 this->int_status = 0; in efi_net_shutdown()
429 u32 *int_status, void **txbuf) in efi_net_get_status() argument
433 EFI_ENTRY("%p, %p, %p", this, int_status, txbuf); in efi_net_get_status()
454 if (int_status) { in efi_net_get_status()
455 *int_status = this->int_status; in efi_net_get_status()
456 this->int_status = 0; in efi_net_get_status()
550 this->int_status |= EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT; in efi_net_transmit()
633 this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT; in efi_net_receive()
[all …]
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| /external/arm-trusted-firmware/plat/hisilicon/hikey960/drivers/ipc/ |
| D | hisi_ipc.c | 82 unsigned int int_status = 0; in hisi_ipc_clear_ack() local
85 int_status = mmio_read_32(IPC_MBX_MODE_REG(mbox)); in hisi_ipc_clear_ack()
86 int_status &= 0xF0; in hisi_ipc_clear_ack()
88 } while (int_status != IPC_ACK_BIT_SHIFT); in hisi_ipc_clear_ack()
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| /external/u-boot/cmd/ti/ |
| D | ddr3.c | 164 u32 int_status = readl(&emif->emif_irqstatus_raw_sys); in ddr_check_ecc_status() local
173 if (int_status & EMIF_INT_WR_ECC_ERR_SYS_MASK) in ddr_check_ecc_status()
176 if (int_status & EMIF_INT_TWOBIT_ECC_ERR_SYS_MASK) in ddr_check_ecc_status()
180 if (int_status & EMIF_INT_ONEBIT_ECC_ERR_SYS_MASK) in ddr_check_ecc_status()
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| /external/libtextclassifier/native/utils/base/ |
| D | statusor_test.cc | 89 StatusOr<int> int_status(19); in TEST() local
91 StatusOr<Foo> copied_status(int_status); in TEST()
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| /external/u-boot/lib/efi_selftest/ |
| D | efi_selftest_snp.c | 330 u32 int_status; in execute() local
357 ret = net->get_status(net, &int_status, NULL); in execute()
362 if (!(int_status & EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT)) { in execute()
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| /external/u-boot/arch/arm/include/asm/arch-rockchip/ |
| D | gpio.h | 17 u32 int_status; member
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| /external/perfetto/src/traced/probes/ftrace/test/data/android_seed_N2F62_3.10.49/events/mmc/mmc_data_rw_end/ |
| D | format | 12 print fmt: "cmd=%u,int_status=0x%08x", REC->cmd, REC->status
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| /external/u-boot/arch/arm/mach-exynos/include/mach/ |
| D | adc.h | 63 unsigned int int_status; member
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| /external/u-boot/board/freescale/t104xrdb/ |
| D | cpld.h | 20 u8 int_status; /* 0x12 - Interrupt status Register */ member
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| D | cpld.c | 68 printf("int_status = 0x%02x\n", CPLD_READ(int_status)); in cpld_dump_regs()
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| /external/u-boot/board/freescale/t102xrdb/ |
| D | cpld.h | 15 u8 int_status; /* 0x12 - Interrupt status Register */ member
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| D | cpld.c | 63 printf("int_status = 0x%02x\n", CPLD_READ(int_status)); in cpld_dump_regs()
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| /external/perfetto/src/traced/probes/ftrace/test/data/android_seed_N2F62_3.10.49/events/mmc/mmc_cmd_rw_end/ |
| D | format | 13 print fmt: "cmd=%u,int_status=0x%08x,response=0x%08x", REC->cmd, REC->status, REC->resp
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| /external/u-boot/arch/arm/include/asm/arch-tegra/ |
| D | tegra_i2c.h | 50 u32 int_status; member
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| /external/u-boot/arch/powerpc/include/asm/ |
| D | fsl_pci.h | 75 u32 int_status; /* 0x018 - PCIE interrupt status register */ member
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| /external/u-boot/arch/arm/include/asm/arch-sunxi/ |
| D | display.h | 35 u32 int_status; /* 0x064 */ member
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| /external/u-boot/drivers/tpm/ |
| D | tpm_tis_lpc.c | 44 u32 int_status; member
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| /external/u-boot/drivers/video/ |
| D | fsl_diu_fb.c | 175 __be32 int_status; member
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| D | fsl_dcu_fb.c | 186 u32 int_status; member
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| /external/u-boot/include/ |
| D | efi_api.h | 1280 u32 *int_status, void **txbuf);
1292 u32 int_status; member
|