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Searched refs:kWRegSize (Results 1 – 23 of 23) sorted by relevance

/external/vixl/benchmarks/aarch64/
Dbench-utils.cc85 return PickBool() ? kWRegSize : kXRegSize; in PickRSize()
265 __ Pop(Register(static_cast<int>(GetRandomBits(2)) + 0, kWRegSize), in GenerateMemOperandSequence()
266 Register(static_cast<int>(GetRandomBits(2)) + 4, kWRegSize), in GenerateMemOperandSequence()
267 Register(static_cast<int>(GetRandomBits(2)) + 8, kWRegSize), in GenerateMemOperandSequence()
268 Register(static_cast<int>(GetRandomBits(2)) + 12, kWRegSize)); in GenerateMemOperandSequence()
Dbench-utils.h236 vixl::aarch64::Register PickW() { return PickR(vixl::aarch64::kWRegSize); } in PickW()
/external/v8/src/regexp/arm64/
Dregexp-macro-assembler-arm64.cc778 int align_mask = (alignment / kWRegSize) - 1; in GetCode()
796 __ Cmp(x10, num_wreg_to_allocate * kWRegSize); in GetCode()
812 __ Claim(num_wreg_to_allocate, kWRegSize); in GetCode()
1298 kWRegSize - (kWRegSize * reg_from); in ClearRegisters()
1314 base_offset -= kWRegSize * 2; in ClearRegisters()
1492 -static_cast<int>(kWRegSize), in Push()
1501 MemOperand(backtrack_stackpointer(), kWRegSize, PostIndex)); in Pop()
1599 int offset = kFirstRegisterOnStack - register_index * kWRegSize; in register_location()
1610 int offset = kFirstCaptureOnStack - register_index * kWRegSize; in capture_location()
Dregexp-macro-assembler-arm64.h125 static const int kFirstRegisterOnStack = kBacktrackCount - kWRegSize;
/external/vixl/src/aarch64/
Dinstructions-aarch64.cc38 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in RepeatBitsAcrossReg()
110 unsigned reg_size = GetSixtyFourBits() ? kXRegSize : kWRegSize; in GetImmLogical()
Dsimulator-aarch64.cc348 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); in AddWithCarry()
350 uint64_t max_uint = (reg_size == kWRegSize) ? kWMaxUInt : kXMaxUInt; in AddWithCarry()
351 uint64_t reg_mask = (reg_size == kWRegSize) ? kWRegMask : kXRegMask; in AddWithCarry()
352 uint64_t sign_mask = (reg_size == kWRegSize) ? kWSignMask : kXSignMask; in AddWithCarry()
385 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in ShiftOperand()
1241 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in AddSubHelper()
1281 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in VisitAddSubShifted()
1298 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in VisitAddSubExtended()
1308 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in VisitAddSubWithCarry()
1355 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in VisitLogicalShifted()
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Dinstructions-aarch64.h59 const unsigned kWRegSize = 32; variable
61 const unsigned kWRegSizeInBytes = kWRegSize / 8;
Doperands-aarch64.h144 return IsRegister() && ((size_ == kWRegSize) || (size_ == kXRegSize)) && in IsValidRegister()
304 typedef internal::FixedSizeRegister<kWRegSize> WRegister;
Doperands-aarch64.cc306 VIXL_ASSERT(reg.Is64Bits() || (shift_amount < kWRegSize)); in Operand()
Ddisasm-aarch64.cc305 (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize; in VisitLogicalImmediate()
334 ((reg_size == kWRegSize) && (value <= 0xffffffff))); in IsMovzMovnImm()
352 if ((reg_size == kWRegSize) && (((value & 0xffff0000) == 0xffff0000) || in IsMovzMovnImm()
523 ((instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize) - 1; in VisitBitfield()
5271 reg_size = kWRegSize; in SubstituteRegisterField()
5682 (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize; in SubstituteBitfieldImmediateField()
Dassembler-aarch64.h3781 ((reg_size == kWRegSize) && IsUint5(imms))); in ImmS()
3788 ((reg_size == kWRegSize) && IsUint5(immr))); in ImmR()
3795 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in ImmSetBits()
3803 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in ImmRotate()
3805 ((reg_size == kWRegSize) && IsUint5(immr))); in ImmRotate()
3816 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in BitN()
Dassembler-aarch64.cc421 VIXL_ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSize))); in tbz()
434 VIXL_ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSize))); in tbnz()
5260 VIXL_ASSERT(((imm >> kWRegSize) == 0) || in MoveWide()
5261 ((imm >> (kWRegSize - 1)) == 0x1ffffffff)); in MoveWide()
5818 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); in IsImmMovz()
5835 VIXL_ASSERT((width == kWRegSize) || (width == kXRegSize)); in IsImmLogical()
5876 if (width == kWRegSize) { in IsImmLogical()
5884 value <<= kWRegSize; in IsImmLogical()
5885 value |= value >> kWRegSize; in IsImmLogical()
Dmacro-assembler-aarch64.h855 void PushWRegList(RegList regs) { PushSizeRegList(regs, kWRegSize); } in PushWRegList()
856 void PopWRegList(RegList regs) { PopSizeRegList(regs, kWRegSize); } in PopWRegList()
922 PeekSizeRegList(regs, offset, kWRegSize); in PeekWRegList()
925 PokeSizeRegList(regs, offset, kWRegSize); in PokeWRegList()
Dmacro-assembler-aarch64.cc836 VIXL_ASSERT(((immediate >> kWRegSize) == 0) || in LogicalMacro()
837 ((immediate >> kWRegSize) == 0xffffffff)); in LogicalMacro()
Dsimulator-aarch64.h838 case kWRegSize:
967 case kWRegSize:
/external/v8/src/codegen/arm64/
Dinstructions-arm64.cc172 static_assert(kWRegSize == kSRegSize, "W and S registers must be same size."); in CalcLSPairDataSize()
Dconstants-arm64.h47 const int kWRegSize = kWRegSizeInBits >> 3; variable
/external/vixl/test/aarch64/
Dtest-utils-aarch64.cc370 w[i] = Register(n, kWRegSize); in PopulateRegisterArray()
Dtest-api-aarch64.cc427 Register r_w1(1, kWRegSize); in TEST()
Dtest-assembler-aarch64.cc152 VIXL_ASSERT(!Assembler::IsImmLogical(0x1234, kWRegSize)); in TEST()
7756 ASSERT_EQUAL_64(((1 * base) >> kWRegSize) | ((2 * base) << kWRegSize), x15); in TEST()
7759 ASSERT_EQUAL_32((4 * base) >> kWRegSize, w17); in TEST()
7853 VIXL_CHECK(array[0] == (1 * low_base) + (2 * low_base << kWRegSize)); in TEST()
7854 VIXL_CHECK(array[1] == (3 * low_base) + (4 * low_base << kWRegSize)); in TEST()
7855 VIXL_CHECK(array[2] == (1 * low_base) + (2 * low_base << kWRegSize)); in TEST()
7856 VIXL_CHECK(array[3] == (3 * low_base) + (4 * low_base << kWRegSize)); in TEST()
8053 kWRegSize, in TEST()
8058 kWRegSize, in TEST()
8063 kWRegSize, in TEST()
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Dtest-simulator-aarch64.cc979 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); in TestFPToFixed_Helper()
1045 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); in TestFPToInt_Helper()
Dtest-assembler-fp-aarch64.cc4402 __ Bfi(x11, x10, 0, kWRegSize); in TestUScvtfHelper()
4557 __ Bfi(x11, x10, 0, kWRegSize); in TestUScvtf32Helper()
/external/v8/src/execution/arm64/
Dsimulator-arm64.cc851 static_assert((sizeof(T) == kWRegSize) || (sizeof(T) == kXRegSize), in AddWithCarry()
1037 static_assert(kWRegSize == kSRegSize, "W and S registers must be same size."); in GetPrintRegisterFormatForSize()
1324 case kWRegSize: in PrintRegisterRawHelper()
1999 DCHECK_EQ(access_size, static_cast<unsigned>(kWRegSize)); in LoadStorePairHelper()
2029 DCHECK_EQ(access_size, static_cast<unsigned>(kWRegSize)); in LoadStorePairHelper()
2035 DCHECK_EQ(access_size, static_cast<unsigned>(kWRegSize)); in LoadStorePairHelper()
2477 if (sizeof(T) == kWRegSize) { in DataProcessing2Source()