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Searched refs:lane_size (Results 1 – 10 of 10) sorted by relevance

/external/v8/src/codegen/arm64/
Dassembler-arm64.cc1865 int lane_size = vd.LaneSizeInBytes(); in ins() local
1867 switch (lane_size) { in ins()
1881 DCHECK_EQ(lane_size, 8); in ins()
1900 int lane_size = vn.LaneSizeInBytes(); in smov() local
1903 switch (lane_size) { in smov()
1911 DCHECK_EQ(lane_size, 4); in smov()
2051 int lane_size = vn.LaneSizeInBytes(); in umov() local
2054 switch (lane_size) { in umov()
2068 DCHECK_EQ(lane_size, 8); in umov()
2097 int lane_size = vd.LaneSizeInBytes(); in ins() local
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/external/vixl/src/aarch64/
Dassembler-aarch64.cc2292 unsigned lane_size = vt.GetLaneSizeInBytes(); in LoadStoreStructSingle() local
2293 VIXL_ASSERT(lane < (kQRegSizeInBytes / lane_size)); in LoadStoreStructSingle()
2297 lane *= lane_size; in LoadStoreStructSingle()
2298 if (lane_size == 8) lane++; in LoadStoreStructSingle()
2305 switch (lane_size) { in LoadStoreStructSingle()
2316 VIXL_ASSERT(lane_size == 8); in LoadStoreStructSingle()
4407 int lane_size = vn.GetLaneSizeInBytes(); in dup() local
4409 switch (lane_size) { in dup()
4420 VIXL_ASSERT(lane_size == 8); in dup()
4462 int lane_size = vd.GetLaneSizeInBytes(); in ins() local
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Dsimulator-aarch64.cc516 unsigned reg_size, unsigned lane_size) { in GetPrintRegisterFormatForSize() argument
517 VIXL_ASSERT(reg_size >= lane_size); in GetPrintRegisterFormatForSize()
520 if (reg_size != lane_size) { in GetPrintRegisterFormatForSize()
534 switch (lane_size) { in GetPrintRegisterFormatForSize()
904 int lane_size = 1 << lane_size_log2; in PrintVRegister() local
915 PrintVRegisterFPHelper(code, lane_size, lane_count); in PrintVRegister()
1028 int lane_size = GetPrintRegLaneSizeInBytes(format); in PrintVWrite() local
1030 PrintVRegisterRawHelper(reg_code, reg_size, lane_size * lane); in PrintVWrite()
1032 PrintVRegisterFPHelper(reg_code, lane_size, lane_count, lane); in PrintVWrite()
5460 int lane_size = LaneSizeInBytesFromFormat(vf); in NEONLoadStoreMultiStructHelper() local
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Dlogic-aarch64.cc551 int lane_size = LaneSizeInBitsFromFormat(vform); in add() local
572 dst.SetInt(vform, i, ur >> (64 - lane_size)); in add()
1002 int lane_size = LaneSizeInBitsFromFormat(vform); in sub() local
1023 dst.SetInt(vform, i, ur >> (64 - lane_size)); in sub()
Dsimulator-aarch64.h1433 unsigned lane_size);
/external/v8/src/execution/arm64/
Dsimulator-arm64.cc998 size_t reg_size, size_t lane_size) { in GetPrintRegisterFormatForSize() argument
999 DCHECK_GE(reg_size, lane_size); in GetPrintRegisterFormatForSize()
1002 if (reg_size != lane_size) { in GetPrintRegisterFormatForSize()
1015 switch (lane_size) { in GetPrintRegisterFormatForSize()
1375 int lane_size = 1 << lane_size_log2; in PrintVRegister() local
1386 PrintVRegisterFPHelper(code, lane_size, lane_count); in PrintVRegister()
1463 int lane_size = GetPrintRegLaneSizeInBytes(format); in PrintVWrite() local
1465 PrintVRegisterRawHelper(reg_code, reg_size, lane_size * lane); in PrintVWrite()
1467 PrintVRegisterFPHelper(reg_code, lane_size, lane_count, lane); in PrintVWrite()
4727 int lane_size = LaneSizeInBytesFromFormat(vf); in NEONLoadStoreMultiStructHelper() local
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Dsimulator-logic-arm64.cc647 int lane_size = LaneSizeInBitsFromFormat(vform); in add() local
668 dst.SetInt(vform, i, ur >> (64 - lane_size)); in add()
965 int lane_size = LaneSizeInBitsFromFormat(vform); in sub() local
986 dst.SetInt(vform, i, ur >> (64 - lane_size)); in sub()
Dsimulator-arm64.h1286 size_t lane_size);
/external/v8/src/compiler/backend/arm64/
Dinstruction-selector-arm64.cc3802 Node* node, int lane_size) { in VisitSignExtendLong() argument
3804 code |= MiscField::encode(lane_size); in VisitSignExtendLong()
/external/v8/src/execution/s390/
Dsimulator-s390.cc3194 size_t lane_size = sizeof(input_type); \
3197 j = lane_size; \
3199 for (; j < kSimd128Size; i += 2, j += lane_size * 2, k++) { \