| /external/mesa3d/src/intel/compiler/ |
| D | test_eu_validate.cpp | 119 #define last_inst (&p->store[p->nr_insn - 1]) macro
212 brw_inst_set_exec_size(&devinfo, last_inst, test_case[i].exec_size); in TEST_P()
213 … brw_inst_set_src0_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W); in TEST_P()
214 … brw_inst_set_dst_file_type(&devinfo, last_inst, BRW_GENERAL_REGISTER_FILE, BRW_REGISTER_TYPE_W); in TEST_P()
217 brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_0); in TEST_P()
218 brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_1); in TEST_P()
219 brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_0); in TEST_P()
221 brw_inst_set_src0_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_2); in TEST_P()
222 brw_inst_set_src0_width(&devinfo, last_inst, BRW_WIDTH_2); in TEST_P()
223 brw_inst_set_src0_hstride(&devinfo, last_inst, BRW_HORIZONTAL_STRIDE_1); in TEST_P()
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| /external/deqp-deps/SPIRV-Tools/source/opt/ |
| D | process_lines_pass.cpp | 110 Instruction last_inst = inst->dbg_line_insts().back(); in EliminateDeadLines() local
113 if (last_inst.opcode() == SpvOpNoLine) { in EliminateDeadLines()
119 inst->dbg_line_insts().push_back(last_inst); in EliminateDeadLines()
124 assert(last_inst.opcode() == SpvOpLine && "unexpected debug inst"); in EliminateDeadLines()
126 if (*file_id == last_inst.GetSingleWordInOperand(kSpvLineFileInIdx) && in EliminateDeadLines()
127 *line == last_inst.GetSingleWordInOperand(kSpvLineLineInIdx) && in EliminateDeadLines()
128 *col == last_inst.GetSingleWordInOperand(kSpvLineColInIdx)) { in EliminateDeadLines()
132 *file_id = last_inst.GetSingleWordInOperand(kSpvLineFileInIdx); in EliminateDeadLines()
133 *line = last_inst.GetSingleWordInOperand(kSpvLineLineInIdx); in EliminateDeadLines()
134 *col = last_inst.GetSingleWordInOperand(kSpvLineColInIdx); in EliminateDeadLines()
[all …]
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| /external/angle/third_party/spirv-tools/src/source/opt/ |
| D | process_lines_pass.cpp | 110 Instruction last_inst = inst->dbg_line_insts().back(); in EliminateDeadLines() local
113 if (last_inst.opcode() == SpvOpNoLine) { in EliminateDeadLines()
119 inst->dbg_line_insts().push_back(last_inst); in EliminateDeadLines()
124 assert(last_inst.opcode() == SpvOpLine && "unexpected debug inst"); in EliminateDeadLines()
126 if (*file_id == last_inst.GetSingleWordInOperand(kSpvLineFileInIdx) && in EliminateDeadLines()
127 *line == last_inst.GetSingleWordInOperand(kSpvLineLineInIdx) && in EliminateDeadLines()
128 *col == last_inst.GetSingleWordInOperand(kSpvLineColInIdx)) { in EliminateDeadLines()
132 *file_id = last_inst.GetSingleWordInOperand(kSpvLineFileInIdx); in EliminateDeadLines()
133 *line = last_inst.GetSingleWordInOperand(kSpvLineLineInIdx); in EliminateDeadLines()
134 *col = last_inst.GetSingleWordInOperand(kSpvLineColInIdx); in EliminateDeadLines()
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| /external/swiftshader/third_party/SPIRV-Tools/source/opt/ |
| D | process_lines_pass.cpp | 110 Instruction last_inst = inst->dbg_line_insts().back(); in EliminateDeadLines() local
113 if (last_inst.opcode() == SpvOpNoLine) { in EliminateDeadLines()
119 inst->dbg_line_insts().push_back(last_inst); in EliminateDeadLines()
124 assert(last_inst.opcode() == SpvOpLine && "unexpected debug inst"); in EliminateDeadLines()
126 if (*file_id == last_inst.GetSingleWordInOperand(kSpvLineFileInIdx) && in EliminateDeadLines()
127 *line == last_inst.GetSingleWordInOperand(kSpvLineLineInIdx) && in EliminateDeadLines()
128 *col == last_inst.GetSingleWordInOperand(kSpvLineColInIdx)) { in EliminateDeadLines()
132 *file_id = last_inst.GetSingleWordInOperand(kSpvLineFileInIdx); in EliminateDeadLines()
133 *line = last_inst.GetSingleWordInOperand(kSpvLineLineInIdx); in EliminateDeadLines()
134 *col = last_inst.GetSingleWordInOperand(kSpvLineColInIdx); in EliminateDeadLines()
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| /external/mesa3d/src/gallium/drivers/vc4/ |
| D | vc4_qpu_emit.c | 55 last_inst(struct qblock *block) in last_inst() function
65 *last_inst(block) = qpu_set_cond_add(*last_inst(block), cond); in set_last_cond_add()
71 *last_inst(block) = qpu_set_cond_mul(*last_inst(block), cond); in set_last_cond_mul()
194 *last_inst(block) |= *unpack; in fixup_raddr_conflict()
207 ASSERTED bool had_pm = *last_inst(block) & QPU_PM; in set_last_dst_pack()
208 ASSERTED bool had_ws = *last_inst(block) & QPU_WS; in set_last_dst_pack()
209 ASSERTED uint32_t unpack = QPU_GET_FIELD(*last_inst(block), QPU_UNPACK); in set_last_dst_pack()
214 *last_inst(block) |= QPU_SET_FIELD(inst->dst.pack, QPU_PACK); in set_last_dst_pack()
218 *last_inst(block) |= QPU_PM; in set_last_dst_pack()
500 *last_inst(block) = qpu_set_sig(*last_inst(block), in vc4_generate_code_block()
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| D | vc4_qir.c | 799 struct qinst *last_inst = NULL; in qir_SF() local
802 last_inst = (struct qinst *)c->cur_block->instructions.prev; in qir_SF()
809 last_inst != c->defs[src.index]) { in qir_SF()
810 last_inst = qir_MOV_dest(c, qir_reg(QFILE_NULL, 0), src); in qir_SF()
811 last_inst = (struct qinst *)c->cur_block->instructions.prev; in qir_SF()
813 last_inst->sf = true; in qir_SF()
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| D | vc4_program.c | 188 struct qinst *last_inst = NULL; in ntq_store_dest() local
190 last_inst = (struct qinst *)c->cur_block->instructions.prev; in ntq_store_dest()
194 last_inst && last_inst == c->defs[result.index])); in ntq_store_dest()
222 last_inst = c->defs[result.index]; in ntq_store_dest()
226 c->defs[last_inst->dst.index] = NULL; in ntq_store_dest()
227 last_inst->dst.index = qregs[chan].index; in ntq_store_dest()
233 last_inst->dst.index = qregs[chan].index; in ntq_store_dest()
238 list_del(&last_inst->link); in ntq_store_dest()
240 list_addtail(&last_inst->link, in ntq_store_dest()
243 last_inst->cond = QPU_COND_ZS; in ntq_store_dest()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_debug.c | 264 struct radv_shader_inst *last_inst = *num ? &instructions[*num - 1] : NULL; in si_add_split_disasm() local
280 inst->offset = last_inst ? last_inst->offset + last_inst->size : 0; in si_add_split_disasm()
291 last_inst = inst; in si_add_split_disasm()
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| /external/mesa3d/src/broadcom/compiler/ |
| D | nir_to_vir.c | 475 struct qinst *last_inst = NULL; in ntq_store_dest() local
477 last_inst = (struct qinst *)c->cur_block->instructions.prev; in ntq_store_dest()
480 last_inst && last_inst == c->defs[result.index])); in ntq_store_dest()
508 is_ld_signal(&c->defs[last_inst->dst.index]->qpu.sig)) { in ntq_store_dest()
510 last_inst = c->defs[result.index]; in ntq_store_dest()
514 c->defs[last_inst->dst.index] = NULL; in ntq_store_dest()
515 last_inst->dst.index = qregs[chan].index; in ntq_store_dest()
521 last_inst->dst.index = qregs[chan].index; in ntq_store_dest()
525 c->cursor = vir_before_inst(last_inst); in ntq_store_dest()
528 c->cursor = vir_after_inst(last_inst); in ntq_store_dest()
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| D | v3d40_tex.c | 469 struct qinst *last_inst= (struct qinst *)c->cur_block->instructions.prev; in v3d40_vir_emit_image_load_store() local
470 vir_set_cond(last_inst, V3D_QPU_COND_IFA); in v3d40_vir_emit_image_load_store()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 6619 int last_inst = tgsi_last_instruction(write_mask); in tgsi_f2i() local
6633 if (i == last_inst) in tgsi_f2i()
6652 if (i == last_inst || alu.op == ALU_OP1_FLT_TO_UINT) in tgsi_f2i()
6668 int last_inst = tgsi_last_instruction(write_mask); in tgsi_iabs() local
6685 if (i == last_inst) in tgsi_iabs()
6709 if (i == last_inst) in tgsi_iabs()
6724 int last_inst = tgsi_last_instruction(write_mask); in tgsi_issg() local
6743 if (i == last_inst) in tgsi_issg()
6770 if (i == last_inst) in tgsi_issg()
6785 int last_inst = tgsi_last_instruction(write_mask); in tgsi_ssg() local
[all …]
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| /external/jemalloc_new/bin/ |
| D | jeprof.in | 1989 my $last_inst = $i - 1;
2008 for (my $x = $first_inst; $x <= $last_inst; $x++) {
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| /external/jemalloc/bin/ |
| D | jeprof.in | 1988 my $last_inst = $i - 1;
2007 for (my $x = $first_inst; $x <= $last_inst; $x++) {
|