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Searched refs:load_cntr0 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/altera/
Dsequencer.c758 writel(0xff, &sdr_rw_load_mgr_regs->load_cntr0); in set_jump_as_return()
822 &sdr_rw_load_mgr_regs->load_cntr0); in delay_for_n_mem_clocks()
859 &sdr_rw_load_mgr_regs->load_cntr0); in rw_mgr_mem_init_load_regs()
1142 writel(0x08, &sdr_rw_load_mgr_regs->load_cntr0); in rw_mgr_mem_calibrate_write_test_issue()
1144 writel(0x40, &sdr_rw_load_mgr_regs->load_cntr0); in rw_mgr_mem_calibrate_write_test_issue()
1274 writel(0x20, &sdr_rw_load_mgr_regs->load_cntr0); in rw_mgr_mem_calibrate_read_test_patterns()
1339 writel(0x20, &sdr_rw_load_mgr_regs->load_cntr0); in rw_mgr_mem_calibrate_read_load_patterns()
1416 writel(0x1, &sdr_rw_load_mgr_regs->load_cntr0); in rw_mgr_mem_calibrate_read_test()
1419 writel(0x06, &sdr_rw_load_mgr_regs->load_cntr0); in rw_mgr_mem_calibrate_read_test()
1421 writel(0x32, &sdr_rw_load_mgr_regs->load_cntr0); in rw_mgr_mem_calibrate_read_test()
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Dsequencer.h127 u32 load_cntr0; member