Searched refs:maindiv (Results 1 – 2 of 2) sorted by relevance
20 u32 maindiv; member58 u32 maindiv; member
205 writel(cfg->maindiv, &clock_manager_base->main_pll.maindiv); in cm_basic_init()430 reg = readl(&clock_manager_base->main_pll.maindiv); in cm_get_l4_sp_clk_hz()