| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2-v8.txt | 24 # CHECK: mcrr p14
27 # CHECK: mcrr p15
|
| D | basic-arm-instructions-v8.txt | 42 # CHECK: mcrr p14
45 # CHECK: mcrr p15
|
| D | invalid-armv8.txt | 79 # CHECK-V7: mcrr
|
| D | invalid-thumbv8.txt | 79 # CHECK-V7: mcrr
|
| D | basic-arm-instructions.txt | 720 # CHECK: mcrr p7, #15, r5, r4, c1
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2-v8.txt | 24 # CHECK: mcrr p14
27 # CHECK: mcrr p15
|
| D | basic-arm-instructions-v8.txt | 42 # CHECK: mcrr p14
45 # CHECK: mcrr p15
|
| D | invalid-thumbv8.txt | 79 # CHECK-V7: mcrr
|
| D | invalid-armv8.txt | 79 # CHECK-V7: mcrr
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | intrinsics-coprocessor.ll | 13 ; CHECK: mcrr p7, #1, r{{[0-9]+}}, r{{[0-9]+}}, c1
14 tail call void @llvm.arm.mcrr(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
66 declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind
|
| D | special-reg.ll | 47 ; ARM: mcrr p1, #2, r0, r1, c3
|
| /external/llvm/test/CodeGen/ARM/ |
| D | intrinsics-coprocessor.ll | 14 ; CHECK: mcrr p7, #1, r{{[0-9]+}}, r{{[0-9]+}}, c1
15 tail call void @llvm.arm.mcrr(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
67 declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind
|
| D | special-reg.ll | 47 ; ARM: mcrr p1, #2, r0, r1, c3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
| D | intrinsics-coprocessor.ll | 12 ; CHECK: mcrr p7, #1, r{{[0-9]+}}, r{{[0-9]+}}, c1
13 tail call void @llvm.arm.mcrr(i32 7, i32 1, i32 %0, i32 %1, i32 1) nounwind
81 declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind
|
| /external/clang/test/CodeGen/ |
| D | builtins-arm.c | 185 void mcrr(uint64_t a) { in mcrr() function
|
| /external/u-boot/arch/arm/mach-mediatek/mt7629/ |
| D | lowlevel_init.S | 37 mcrr p15, 4, r0, r0, c14 @ CNTVOFF = 0
|
| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | asm_macros.S | 45 mcrr \coproc, \opc1, \reg1, \reg2, \CRm
|
| /external/llvm/test/MC/ARM/ |
| D | diagnostics.s | 145 mcrr p7, #16, r5, r4, c1
157 mcrr p11, #8, r5, r4, c1
|
| D | basic-arm-instructions.s | 1255 mcrr p7, #15, r5, r4, c1
1258 @ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec]
|
| D | basic-thumb2-instructions.s | 1390 mcrr p7, #15, r5, r4, c1
1393 @ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0x44,0xec,0xf1,0x57]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | diagnostics.s | 161 mcrr p7, #16, r5, r4, c1
175 mcrr p11, #8, r5, r4, c1
|
| D | basic-thumb2-instructions.s | 1422 mcrr p7, #15, r5, r4, c1
1425 @ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0x44,0xec,0xf1,0x57]
|
| D | basic-arm-instructions.s | 1257 mcrr p7, #15, r5, r4, c1
1260 @ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec]
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 345 0xf1,0x57,0x44,0xec = mcrr p7, #15, r5, r4, c1
|
| D | basic-thumb2-instructions.s.cs | 431 0x44,0xec,0xf1,0x57 = mcrr p7, #15, r5, r4, c1
|