Searched refs:mfcr (Results 1 – 25 of 51) sorted by relevance
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | crsave.ll | 10 …%0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i…
19 ; PPC32: mfcr 12
25 ; PPC64: mfcr 12
39 …"\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{…
48 ; PPC32: mfcr 12
55 ; PPC64: mfcr 12
74 ; Generate mfcr in prologue when we need to save all nonvolatile CR field
81 ; PPC64-ELFv2: mfcr [[REG1:[0-9]+]]
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| D | vec_br_cmp.ll | 3 ; RUN: not grep mfcr %t
5 ; A predicate compare used immediately by a branch should not generate an mfcr.
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| D | 2010-02-12-saveCR.ll | 9 ; CHECK: mfcr [[T1:r[0-9]+]] ; cr2
16 ; CHECK: mfcr [[T4:r[0-9]+]] ; cr3
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| D | cc.ll | 21 ; CHECK: mfcr [[REG1:[0-9]+]]
54 ; CHECK: mfcr [[REG1:[0-9]+]]
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| D | cmp-cmp.ll | 1 ; RUN: llc < %s -march=ppc32 | not grep mfcr
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| D | and-branch.ll | 1 ; RUN: llc < %s -march=ppc32 | not grep mfcr
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | crsave.ll | 10 …%0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i…
20 ; PPC32: mfcr 12
26 ; PPC64: mfcr 12
40 …"\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{…
50 ; PPC32: mfcr 12
57 ; PPC64: mfcr 12
76 ; Generate mfcr in prologue when we need to save all nonvolatile CR field
83 ; PPC64-ELFv2: mfcr [[REG1:[0-9]+]]
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| D | vec_br_cmp.ll | 3 ; RUN: not grep mfcr %t
5 ; A predicate compare used immediately by a branch should not generate an mfcr.
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| D | 2010-02-12-saveCR.ll | 9 ; CHECK: mfcr [[T1:r[0-9]+]] ; cr2
14 ; CHECK: mfcr [[T4:r[0-9]+]] ; cr3
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| D | cc.ll | 21 ; CHECK: mfcr [[REG1:[0-9]+]]
54 ; CHECK: mfcr [[REG1:[0-9]+]]
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| D | cmp-cmp.ll | 1 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep mfcr
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| D | and-branch.ll | 1 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep mfcr
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| D | save-cr-ppc32svr4.ll | 10 ; CHECK-DAG: mfcr [[CR:[0-9]+]]
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| D | save-crbp-ppc32svr4.ll | 15 ; CHECK: mfcr 12
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| /external/u-boot/post/lib_powerpc/ |
| D | asm.S | 122 mfcr r0
153 mfcr r0
293 mfcr r7
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| /external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
| D | basic_asm.h | 62 mfcr r0; \
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| /external/u-boot/examples/standalone/ |
| D | ppc_setjmp.S | 34 mfcr r0
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| /external/llvm/lib/Target/PowerPC/ |
| D | README.txt | 26 mfcr r4 ; 1
487 mfcr r2
494 We compile some FP comparisons into an mfcr with two rlwinms and an or. For
505 mfcr r2
516 mfcr r3
569 ; RUN: llvm-as < %s | llc -march=ppc32 | grep mfcr | count 3
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| D | README_ALTIVEC.txt | 149 mfcr here:
160 mfcr r3, 2
192 Should codegen branches on vec_any/vec_all to avoid mfcr. Two examples:
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | README.txt | 26 mfcr r4 ; 1
487 mfcr r2
494 We compile some FP comparisons into an mfcr with two rlwinms and an or. For
505 mfcr r2
516 mfcr r3
569 ; RUN: llvm-as < %s | llc -march=ppc32 | grep mfcr | count 3
|
| D | README_ALTIVEC.txt | 149 mfcr here:
160 mfcr r3, 2
192 Should codegen branches on vec_any/vec_all to avoid mfcr. Two examples:
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| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding.s.cs | 200 0x7c,0x40,0x00,0x26 = mfcr 2
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| /external/compiler-rt/lib/tsan/rtl/ |
| D | tsan_rtl_ppc64.S | 62 mfcr r0
207 mfcr r0
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| /external/swiftshader/third_party/marl/src/ |
| D | osfiber_asm_ppc64.S | 55 mfcr 5
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| /external/linux-kselftest/tools/testing/selftests/powerpc/switch_endian/ |
| D | check.S | 21 mfcr r10
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