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Searched refs:mrrc (Results 1 – 25 of 41) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dthumb2-v8.txt30 # CHECK: mrrc p14
33 # CHECK: mrrc p15
Dbasic-arm-instructions-v8.txt48 # CHECK: mrrc p14
51 # CHECK: mrrc p15
Dinvalid-armv8.txt99 # CHECK-V7: mrrc
Dinvalid-thumbv8.txt99 # CHECK-V7: mrrc
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2-v8.txt30 # CHECK: mrrc p14
33 # CHECK: mrrc p15
Dbasic-arm-instructions-v8.txt48 # CHECK: mrrc p14
51 # CHECK: mrrc p15
Dinvalid-thumbv8.txt99 # CHECK-V7: mrrc
Dinvalid-armv8.txt99 # CHECK-V7: mrrc
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dintrinsics-coprocessor.ll37 ; CHECK: mrrc p1, #2, r{{[0-9]+}}, r{{[0-9]+}}, c3
38 %2 = tail call { i32, i32 } @llvm.arm.mrrc(i32 1, i32 2, i32 3) nounwind
76 declare { i32, i32 } @llvm.arm.mrrc(i32, i32, i32) nounwind
Dspecial-reg.ll15 ; ARM: mrrc p1, #2, r0, r1, c3
/external/llvm/test/CodeGen/ARM/
Dintrinsics-coprocessor.ll38 ; CHECK: mrrc p1, #2, r{{[0-9]+}}, r{{[0-9]+}}, c3
39 %2 = tail call { i32, i32 } @llvm.arm.mrrc(i32 1, i32 2, i32 3) nounwind
77 declare { i32, i32 } @llvm.arm.mrrc(i32, i32, i32) nounwind
Dspecial-reg.ll15 ; ARM: mrrc p1, #2, r0, r1, c3
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
Dintrinsics-coprocessor.ll36 ; CHECK: mrrc p1, #2, r{{[0-9]+}}, r{{[0-9]+}}, c3
37 %2 = tail call { i32, i32 } @llvm.arm.mrrc(i32 1, i32 2, i32 3) nounwind
91 declare { i32, i32 } @llvm.arm.mrrc(i32, i32, i32) nounwind
/external/clang/test/CodeGen/
Dbuiltins-arm.c197 uint64_t mrrc() { in mrrc() function
/external/arm-trusted-firmware/include/arch/aarch32/
Dasm_macros.S37 mrrc \coproc, \opc1, \reg1, \reg2, \CRm
/external/llvm/test/MC/ARM/
Dthumb2-diagnostics.s40 mrrc p7, #16, r5, r4, c1
Ddiagnostics.s180 mrrc p7, #16, r5, r4, c1
Dbasic-arm-instructions.s1398 mrrc p7, #1, r5, r4, c1
1401 @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec]
Dbasic-thumb2-instructions.s1537 mrrc p7, #1, r5, r4, c1
1540 @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dthumb2-diagnostics.s40 mrrc p7, #16, r5, r4, c1
Ddiagnostics.s206 mrrc p7, #16, r5, r4, c1
Dbasic-thumb2-instructions.s1585 mrrc p7, #1, r5, r4, c1
1588 @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57]
Dbasic-arm-instructions.s1400 mrrc p7, #1, r5, r4, c1
1403 @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec]
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs382 0x11,0x57,0x54,0xec = mrrc p7, #1, r5, r4, c1
Dbasic-thumb2-instructions.s.cs486 0x54,0xec,0x11,0x57 = mrrc p7, #1, r5, r4, c1

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