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Searched refs:mxc_plls (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx5/
Dclock.c28 struct mxc_pll_reg *mxc_plls[PLL_CLOCKS] = { variable
241 ret_val = decode_pll(mxc_plls[PLL4_CLOCK], MXC_HCLK); in get_lp_apm()
257 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_mcu_main_clk()
270 return decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK); in get_periph_clk()
274 return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_periph_clk()
276 return decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK); in get_periph_clk()
328 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
331 freq = decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
334 freq = decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
456 ret_val = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_ddr_clk()
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