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Searched refs:num_rings (Results 1 – 15 of 15) sorted by relevance

/external/igt-gpu-tools/tests/i915/
Dgem_non_secure_batch.c53 static int num_rings = 1; variable
63 int ring = random() % num_rings + 1; in mi_lri_loop()
85 num_rings++;
88 num_rings++;
91 igt_info("num rings detected: %i\n", num_rings);
/external/igt-gpu-tools/overlay/
Dgpu-top.c75 gt->num_rings = 1; in perf_init()
95 gt->ring[gt->num_rings++].name = d->name; in perf_init()
130 for (n = m = 0; n < gt->num_rings; n++) { in gpu_top_update()
142 for (n = 0; n < gt->num_rings; n++) { in gpu_top_update()
Dgpu-top.h36 int num_rings; member
Doverlay.c165 for (n = 0; n < gt->gpu_top.num_rings; n++) { in init_gpu_top()
177 for (n = 0; n < gt->gpu_top.num_rings; n++) { in init_gpu_top()
208 for (n = 0; n < gt->gpu_top.num_rings; n++) { in show_gpu_top()
214 for (n = 0; n < gt->gpu_top.num_rings; n++) { in show_gpu_top()
223 y2 = y1 + (gt->gpu_top.num_rings+1) * 14 + 4; in show_gpu_top()
253 for (n = 0; n < gt->gpu_top.num_rings; n++) { in show_gpu_top()
/external/mesa3d/src/amd/common/
Dac_gpu_info.c592 info->num_rings[RING_GFX] = util_bitcount(gfx.available_rings); in ac_query_gpu_info()
593 info->num_rings[RING_COMPUTE] = util_bitcount(compute.available_rings); in ac_query_gpu_info()
594 info->num_rings[RING_DMA] = util_bitcount(dma.available_rings); in ac_query_gpu_info()
595 info->num_rings[RING_UVD] = util_bitcount(uvd.available_rings); in ac_query_gpu_info()
596 info->num_rings[RING_VCE] = util_bitcount(vce.available_rings); in ac_query_gpu_info()
597 info->num_rings[RING_UVD_ENC] = util_bitcount(uvd_enc.available_rings); in ac_query_gpu_info()
598 info->num_rings[RING_VCN_DEC] = util_bitcount(vcn_dec.available_rings); in ac_query_gpu_info()
599 info->num_rings[RING_VCN_ENC] = util_bitcount(vcn_enc.available_rings); in ac_query_gpu_info()
600 info->num_rings[RING_VCN_JPEG] = util_bitcount(vcn_jpeg.available_rings); in ac_query_gpu_info()
872 fprintf(f, " num_rings[RING_GFX] = %i\n", info->num_rings[RING_GFX]); in ac_print_gpu_info()
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Dac_gpu_info.h63 uint32_t num_rings[NUM_RING_TYPES]; member
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_winsys.c70 ws->info.num_rings[RING_DMA] = MIN2(ws->info.num_rings[RING_DMA], MAX_RINGS_PER_TYPE); in do_winsys_init()
71 ws->info.num_rings[RING_COMPUTE] = MIN2(ws->info.num_rings[RING_COMPUTE], MAX_RINGS_PER_TYPE); in do_winsys_init()
/external/u-boot/drivers/soc/ti/
Dk3-navss-ringacc.c187 u32 num_rings; /* number of rings in Ringacc module */ member
925 ringacc->num_rings = dev_read_u32_default(dev, "ti,num-rings", 0); in k3_nav_ringacc_probe_dt()
926 if (!ringacc->num_rings) { in k3_nav_ringacc_probe_dt()
1008 ringacc->num_rings, in k3_nav_ringacc_probe()
1011 BITS_TO_LONGS(ringacc->num_rings), in k3_nav_ringacc_probe()
1020 for (i = 0; i < ringacc->num_rings; i++) { in k3_nav_ringacc_probe()
1036 ringacc->num_rings, in k3_nav_ringacc_probe()
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_winsys.c308 ws->info.num_rings[RING_GFX] = 1; in do_winsys_init()
310 ws->info.num_rings[RING_DMA] = 0; in do_winsys_init()
313 ws->info.num_rings[RING_DMA] = 1; in do_winsys_init()
324 ws->info.num_rings[RING_UVD] = 1; in do_winsys_init()
334 ws->info.num_rings[RING_VCE] = 1; in do_winsys_init()
/external/igt-gpu-tools/tools/
Dintel_error_decode.c574 int num_rings = 0; in read_data_file() local
701 head[num_rings++] = print_head(reg); in read_data_file()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_pipe_common.c640 if (rscreen->info.num_rings[RING_DMA] && !(rscreen->debug_flags & DBG_NO_ASYNC_DMA)) { in r600_common_context_init()
1328 printf("num_rings[RING_DMA] = %i\n", rscreen->info.num_rings[RING_DMA]); in r600_common_screen_init()
1329 printf("num_rings[RING_COMPUTE] = %u\n", rscreen->info.num_rings[RING_COMPUTE]); in r600_common_screen_init()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_pipe.c515 if (sscreen->info.num_rings[RING_DMA] && !(sscreen->debug_flags & DBG(NO_SDMA)) && in si_create_context()
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_cs.c1235 acs->ctx->ws->info.num_rings[acs->ring_type] == 1) && in is_noop_fence_dependency()
/external/mesa3d/src/amd/vulkan/
Dradv_device.c2144 if (pdevice->rad_info.num_rings[RING_COMPUTE] > 0 && in radv_get_physical_device_queue_family_properties()
2170 if (pdevice->rad_info.num_rings[RING_COMPUTE] > 0 && in radv_get_physical_device_queue_family_properties()
2177 .queueCount = pdevice->rad_info.num_rings[RING_COMPUTE], in radv_get_physical_device_queue_family_properties()
/external/mesa3d/docs/relnotes/
D20.0.0.rst2227 - ac: add radeon_info::num_rings and move ring_type to amd_family.h
2228 - ac: fill num_rings for remaining IPs