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Searched refs:p_addr (Results 1 – 22 of 22) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
D2007-03-15-GEP-Idx-Sink.ll26 %p_addr.076.0.rec = mul i32 %i.073.0, 9 ; <i32> [#uses=9]
27 %p_addr.076.0 = getelementptr i8, i8* %p, i32 %p_addr.076.0.rec ; <i8*> [#uses=1]
31 %tmp7 = load i8, i8* %p_addr.076.0 ; <i8> [#uses=1]
33 %p_addr.076.0.sum93 = add i32 %p_addr.076.0.rec, 1 ; <i32> [#uses=1]
34 %tmp11 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum93 ; <i8*> [#uses=1]
38 %p_addr.076.0.sum92 = add i32 %p_addr.076.0.rec, 2 ; <i32> [#uses=1]
39 %tmp17 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum92 ; <i8*> [#uses=1]
43 %p_addr.076.0.sum91 = add i32 %p_addr.076.0.rec, 3 ; <i32> [#uses=1]
44 %tmp23 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum91 ; <i8*> [#uses=1]
48 %p_addr.076.0.sum90 = add i32 %p_addr.076.0.rec, 4 ; <i32> [#uses=1]
[all …]
D2009-02-09-ivs-different-sizes.ll19 … %p_addr.0.pn.rec = phi i64 [ %p_addr.6.rec, %bb62 ], [ 0, %bb54 ] ; <i64> [#uses=2]
20 %ch.6.in.in = phi i8* [ %p_addr.6, %bb62 ], [ null, %bb54 ] ; <i8*> [#uses=0]
21 %indvar202 = trunc i64 %p_addr.0.pn.rec to i32 ; <i32>[#uses=1]
23 %p_addr.6.rec = add i64 %p_addr.0.pn.rec, 1 ; <i64>[#uses=2]
24 %p_addr.6 = getelementptr i8, i8* null, i64 %p_addr.6.rec ; <i8*>[#uses=1]
/external/llvm/test/CodeGen/X86/
D2007-03-15-GEP-Idx-Sink.ll27 %p_addr.076.0.rec = mul i32 %i.073.0, 9 ; <i32> [#uses=9]
28 %p_addr.076.0 = getelementptr i8, i8* %p, i32 %p_addr.076.0.rec ; <i8*> [#uses=1]
32 %tmp7 = load i8, i8* %p_addr.076.0 ; <i8> [#uses=1]
34 %p_addr.076.0.sum93 = add i32 %p_addr.076.0.rec, 1 ; <i32> [#uses=1]
35 %tmp11 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum93 ; <i8*> [#uses=1]
39 %p_addr.076.0.sum92 = add i32 %p_addr.076.0.rec, 2 ; <i32> [#uses=1]
40 %tmp17 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum92 ; <i8*> [#uses=1]
44 %p_addr.076.0.sum91 = add i32 %p_addr.076.0.rec, 3 ; <i32> [#uses=1]
45 %tmp23 = getelementptr i8, i8* %p, i32 %p_addr.076.0.sum91 ; <i8*> [#uses=1]
49 %p_addr.076.0.sum90 = add i32 %p_addr.076.0.rec, 4 ; <i32> [#uses=1]
[all …]
D2009-02-09-ivs-different-sizes.ll19 … %p_addr.0.pn.rec = phi i64 [ %p_addr.6.rec, %bb62 ], [ 0, %bb54 ] ; <i64> [#uses=2]
20 %ch.6.in.in = phi i8* [ %p_addr.6, %bb62 ], [ null, %bb54 ] ; <i8*> [#uses=0]
21 %indvar202 = trunc i64 %p_addr.0.pn.rec to i32 ; <i32>[#uses=1]
23 %p_addr.6.rec = add i64 %p_addr.0.pn.rec, 1 ; <i64>[#uses=2]
24 %p_addr.6 = getelementptr i8, i8* null, i64 %p_addr.6.rec ; <i8*>[#uses=1]
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dcpu.c483 setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg);
485 void clear_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg);
578 static int reset_tlb(phys_addr_t p_addr, u32 size, phys_addr_t *phys_offset) in reset_tlb() argument
585 clear_ddr_tlbs_phys(p_addr, size>>20); in reset_tlb()
588 setup_ddr_tlbs_phys(p_addr, size>>20); in reset_tlb()
609 phys_addr_t test_cap, p_addr; in arch_memory_test_advance() local
619 p_addr = (*vstart) + (*size) + (*phys_offset); in arch_memory_test_advance()
620 if (p_addr < test_cap - 1) { in arch_memory_test_advance()
621 p_size = min(test_cap - p_addr, CONFIG_MAX_MEM_MAPPED); in arch_memory_test_advance()
622 if (reset_tlb(p_addr, p_size, phys_offset) == -1) in arch_memory_test_advance()
Dtlb.c240 uint64_t tlb_map_range(ulong v_addr, phys_addr_t p_addr, uint64_t size, in tlb_map_range() argument
287 set_tlb(1, v_addr, p_addr, perm, wimge, in tlb_map_range()
292 p_addr += 1UL << camsize; in tlb_map_range()
298 unsigned int setup_ddr_tlbs_phys(phys_addr_t p_addr, in setup_ddr_tlbs_phys() argument
306 size = tlb_map_range(ram_tlb_address, p_addr, size, TLB_MAP_RAM); in setup_ddr_tlbs_phys()
324 void clear_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg) in clear_ddr_tlbs_phys() argument
/external/llvm/test/Transforms/LoopUnswitch/
Dpreserve-analyses.ll19 %2 = icmp eq i8* %p_addr.0, %s ; <i1> [#uses=1]
23 %3 = getelementptr inbounds i8, i8* %p_addr.0, i32 1 ; <i8*> [#uses=3]
58 %p_addr.0.ph = phi i8* [ %p, %entry ], [ %.lcssa2, %bb8.outer.backedge ] ; <i8*> [#uses=1]
63 %p_addr.0 = phi i8* [ %p_addr.0.ph, %bb8.outer ], [ %3, %bb8.backedge ] ; <i8*> [#uses=3]
64 %7 = load i8, i8* %p_addr.0, align 1 ; <i8> [#uses=2]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopUnswitch/
Dpreserve-analyses.ll19 %2 = icmp eq i8* %p_addr.0, %s ; <i1> [#uses=1]
23 %3 = getelementptr inbounds i8, i8* %p_addr.0, i32 1 ; <i8*> [#uses=3]
58 %p_addr.0.ph = phi i8* [ %p, %entry ], [ %.lcssa2, %bb8.outer.backedge ] ; <i8*> [#uses=1]
63 %p_addr.0 = phi i8* [ %p_addr.0.ph, %bb8.outer ], [ %3, %bb8.backedge ] ; <i8*> [#uses=3]
64 %7 = load i8, i8* %p_addr.0, align 1 ; <i8> [#uses=2]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SimpleLoopUnswitch/
Dpreserve-analyses.ll19 %2 = icmp eq i8* %p_addr.0, %s ; <i1> [#uses=1]
23 %3 = getelementptr inbounds i8, i8* %p_addr.0, i32 1 ; <i8*> [#uses=3]
58 %p_addr.0.ph = phi i8* [ %p, %entry ], [ %.lcssa2, %bb8.outer.backedge ] ; <i8*> [#uses=1]
63 %p_addr.0 = phi i8* [ %p_addr.0.ph, %bb8.outer ], [ %3, %bb8.backedge ] ; <i8*> [#uses=3]
64 %7 = load i8, i8* %p_addr.0, align 1 ; <i8> [#uses=2]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Mem2Reg/
D2005-06-30-ReadBeforeWrite.ll7 %p_addr = alloca i8* ; <i8**> [#uses=2]
12 store i8* %p, i8** %p_addr
32 %tmp.9 = load i8*, i8** %p_addr ; <i8*> [#uses=1]
/external/llvm/test/Transforms/Mem2Reg/
D2005-06-30-ReadBeforeWrite.ll7 %p_addr = alloca i8* ; <i8**> [#uses=2]
12 store i8* %p, i8** %p_addr
32 %tmp.9 = load i8*, i8** %p_addr ; <i8*> [#uses=1]
/external/llvm/test/Transforms/InstCombine/
Dcall2.ll17 %p_addr = alloca i8* ; <i8**> [#uses=1]
19 store i8* %p, i8** %p_addr
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dcall2.ll17 %p_addr = alloca i8* ; <i8**> [#uses=1]
19 store i8* %p, i8** %p_addr
/external/llvm/test/CodeGen/ARM/
D2007-03-07-CombinerCrash.ll7 %p_addr.0 = getelementptr i8, i8* %p, i32 0 ; <i8*> [#uses=1]
8 %tmp2 = load i8, i8* %p_addr.0 ; <i8> [#uses=2]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
D2007-03-07-CombinerCrash.ll7 %p_addr.0 = getelementptr i8, i8* %p, i32 0 ; <i8*> [#uses=1]
8 %tmp2 = load i8, i8* %p_addr.0 ; <i8> [#uses=2]
/external/u-boot/drivers/net/
Dmvgbe.c383 static void port_uc_addr_set(struct mvgbe_device *dmvgbe, u8 *p_addr) in port_uc_addr_set() argument
389 mac_l = (p_addr[4] << 8) | (p_addr[5]); in port_uc_addr_set()
390 mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) | (p_addr[2] << 8) | in port_uc_addr_set()
391 (p_addr[3] << 0); in port_uc_addr_set()
397 port_uc_addr(regs, p_addr[5], ACCEPT_MAC_ADDR); in port_uc_addr_set()
/external/llvm/test/CodeGen/Thumb2/
D2009-07-17-CrossRegClassCopy.ll20 %p_addr.0.i = getelementptr i8, i8* undef, i32 %tmp39 ; <i8*> [#uses=1]
21 %0 = load i8, i8* %p_addr.0.i, align 1 ; <i8> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
D2009-07-17-CrossRegClassCopy.ll20 %p_addr.0.i = getelementptr i8, i8* undef, i32 %tmp39 ; <i8*> [#uses=1]
21 %0 = load i8, i8* %p_addr.0.i, align 1 ; <i8> [#uses=1]
/external/perfetto/src/traced/probes/ftrace/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/kmem/iommu_map_range/
Dformat14 print fmt: "v_addr=%p p_addr=%pa chunk_size=0x%lu len=%zu", (void *)REC->va, &REC->pa, REC->chunk_s…
/external/perfetto/src/traced/probes/ftrace/test/data/android_seed_N2F62_3.10.49/events/kmem/iommu_map_range/
Dformat14 print fmt: "v_addr=%p p_addr=%pa chunk_size=0x%lu len=%zu", (void *)REC->va, &REC->pa, REC->chunk_s…
/external/perfetto/src/traced/probes/ftrace/test/data/android_hammerhead_MRA59G_3.4.0/events/kmem/iommu_map_range/
Dformat15 print fmt: "v_addr=%p p_addr=%pa chunk_size=0x%x len=%zu", (void *)REC->va, &REC->pa, REC->chunk_si…
/external/u-boot/arch/powerpc/include/asm/
Dmmu.h517 extern uint64_t tlb_map_range(ulong v_addr, phys_addr_t p_addr, uint64_t size,